linux-kernel - Re: [PATCH 2/2] drivers: perf: added capabilities for legacy PMU

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAOnJCUJ-eE+zbXH0yBX_QBK2ep779q=wNCSrc+BJfzUb+zBCaw@mail.gmail.com>
Date:   Fri, 8 Dec 2023 13:06:10 -0800
From:   Atish Patra <atishp@...shpatra.org>
To:     Vadim Shakirov <vadim.shakirov@...tacore.com>
Cc:     Anup Patel <anup@...infault.org>, Will Deacon <will@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Alexandre Ghiti <alexghiti@...osinc.com>,
        Andrew Jones <ajones@...tanamicro.com>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] drivers: perf: added capabilities for legacy PMU

On Tue, Dec 5, 2023 at 1:26 AM Vadim Shakirov
<vadim.shakirov@...tacore.com> wrote:
>
> Added the PERF_PMU_CAP_NO_INTERRUPT flag because the legacy pmu driver
> does not provide sampling capabilities
>
> Added the PERF_PMU_CAP_NO_EXCLUDE flag because the legacy pmu driver
> does not provide the ability to disable counter incrementation in
> different privilege modes
>
> Suggested-by: Atish Patra <atishp@...shpatra.org>
> Signed-off-by: Vadim Shakirov <vadim.shakirov@...tacore.com>
> ---
>  drivers/perf/riscv_pmu_legacy.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
> index a179ed6ac980..fa0bccf4edf2 100644
> --- a/drivers/perf/riscv_pmu_legacy.c
> +++ b/drivers/perf/riscv_pmu_legacy.c
> @@ -123,6 +123,8 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
>         pmu->event_mapped = pmu_legacy_event_mapped;
>         pmu->event_unmapped = pmu_legacy_event_unmapped;
>         pmu->csr_index = pmu_legacy_csr_index;
> +       pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
> +       pmu->pmu.capabilities |= PERF_PMU_CAP_NO_EXCLUDE;
>
>         perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW);
>  }
> --
> 2.34.1
>

Reviewed-by: Atish Patra <atishp@...osinc.com>

-- 
Regards,
Atish