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Message-ID: <CAOnJCUL-tCn+KNyczz6aXNbgOb1RYeYk45i0rjy0h=rYtcMbAw@mail.gmail.com>
Date: Fri, 8 Dec 2023 13:09:00 -0800
From: Atish Patra <atishp@...shpatra.org>
To: Vadim Shakirov <vadim.shakirov@...tacore.com>
Cc: Anup Patel <anup@...infault.org>, Will Deacon <will@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alexghiti@...osinc.com>,
Andrew Jones <ajones@...tanamicro.com>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] drivers: perf: ctr_get_width function for legacy is
not defined
On Tue, Dec 5, 2023 at 1:26 AM Vadim Shakirov
<vadim.shakirov@...tacore.com> wrote:
>
> With parameters CONFIG_RISCV_PMU_LEGACY=y and CONFIG_RISCV_PMU_SBI=n
> linux kernel crashes when you try perf record:
>
> $ perf record ls
> [ 46.749286] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
> [ 46.750199] Oops [#1]
> [ 46.750342] Modules linked in:
> [ 46.750608] CPU: 0 PID: 107 Comm: perf-exec Not tainted 6.6.0 #2
> [ 46.750906] Hardware name: riscv-virtio,qemu (DT)
> [ 46.751184] epc : 0x0
> [ 46.751430] ra : arch_perf_update_userpage+0x54/0x13e
> [ 46.751680] epc : 0000000000000000 ra : ffffffff8072ee52 sp : ff2000000022b8f0
> [ 46.751958] gp : ffffffff81505988 tp : ff6000000290d400 t0 : ff2000000022b9c0
> [ 46.752229] t1 : 0000000000000001 t2 : 0000000000000003 s0 : ff2000000022b930
> [ 46.752451] s1 : ff600000028fb000 a0 : 0000000000000000 a1 : ff600000028fb000
> [ 46.752673] a2 : 0000000ae2751268 a3 : 00000000004fb708 a4 : 0000000000000004
> [ 46.752895] a5 : 0000000000000000 a6 : 000000000017ffe3 a7 : 00000000000000d2
> [ 46.753117] s2 : ff600000028fb000 s3 : 0000000ae2751268 s4 : 0000000000000000
> [ 46.753338] s5 : ffffffff8153e290 s6 : ff600000863b9000 s7 : ff60000002961078
> [ 46.753562] s8 : ff60000002961048 s9 : ff60000002961058 s10: 0000000000000001
> [ 46.753783] s11: 0000000000000018 t3 : ffffffffffffffff t4 : ffffffffffffffff
> [ 46.754005] t5 : ff6000000292270c t6 : ff2000000022bb30
> [ 46.754179] status: 0000000200000100 badaddr: 0000000000000000 cause: 000000000000000c
> [ 46.754653] Code: Unable to access instruction at 0xffffffffffffffec.
> [ 46.754939] ---[ end trace 0000000000000000 ]---
> [ 46.755131] note: perf-exec[107] exited with irqs disabled
> [ 46.755546] note: perf-exec[107] exited with preempt_count 4
>
> This happens because in the legacy case the ctr_get_width function was not
> defined, but it is used in arch_perf_update_userpage.
>
> Also remove extra check in riscv_pmu_ctr_get_width_mask
>
> Fixes: cc4c07c89aad ("drivers: perf: Implement perf event mmap support in the SBI backend")
> Signed-off-by: Vadim Shakirov <vadim.shakirov@...tacore.com>
> ---
> drivers/perf/riscv_pmu.c | 18 +++++-------------
> drivers/perf/riscv_pmu_legacy.c | 8 +++++++-
> 2 files changed, 12 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c
> index 0dda70e1ef90..c78a6fd6c57f 100644
> --- a/drivers/perf/riscv_pmu.c
> +++ b/drivers/perf/riscv_pmu.c
> @@ -150,19 +150,11 @@ u64 riscv_pmu_ctr_get_width_mask(struct perf_event *event)
> struct riscv_pmu *rvpmu = to_riscv_pmu(event->pmu);
> struct hw_perf_event *hwc = &event->hw;
>
> - if (!rvpmu->ctr_get_width)
> - /**
> - * If the pmu driver doesn't support counter width, set it to default
> - * maximum allowed by the specification.
> - */
> - cwidth = 63;
> - else {
> - if (hwc->idx == -1)
> - /* Handle init case where idx is not initialized yet */
> - cwidth = rvpmu->ctr_get_width(0);
> - else
> - cwidth = rvpmu->ctr_get_width(hwc->idx);
> - }
> + if (hwc->idx == -1)
> + /* Handle init case where idx is not initialized yet */
> + cwidth = rvpmu->ctr_get_width(0);
> + else
> + cwidth = rvpmu->ctr_get_width(hwc->idx);
>
> return GENMASK_ULL(cwidth, 0);
> }
> diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
> index 79fdd667922e..a179ed6ac980 100644
> --- a/drivers/perf/riscv_pmu_legacy.c
> +++ b/drivers/perf/riscv_pmu_legacy.c
> @@ -37,6 +37,12 @@ static int pmu_legacy_event_map(struct perf_event *event, u64 *config)
> return pmu_legacy_ctr_get_idx(event);
> }
>
> +/* cycle & instret are always 64 bit, one bit less according to SBI spec */
> +static int pmu_legacy_ctr_get_width(int idx)
> +{
> + return 63;
> +}
> +
> static u64 pmu_legacy_read_ctr(struct perf_event *event)
> {
> struct hw_perf_event *hwc = &event->hw;
> @@ -111,7 +117,7 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
> pmu->ctr_stop = NULL;
> pmu->event_map = pmu_legacy_event_map;
> pmu->ctr_get_idx = pmu_legacy_ctr_get_idx;
> - pmu->ctr_get_width = NULL;
> + pmu->ctr_get_width = pmu_legacy_ctr_get_width;
> pmu->ctr_clear_idx = NULL;
> pmu->ctr_read = pmu_legacy_read_ctr;
> pmu->event_mapped = pmu_legacy_event_mapped;
> --
> 2.34.1
>
Reviewed-by: Atish Patra <atishp@...osinc.com>
--
Regards,
Atish
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