linux-kernel - RE: [PATCH v3 1/2] dt-bindings: gpio: realtek: Add realtek,rtd-gpio

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Message-ID: <b3a41f598bc043ce9626b674a92b8da4@realtek.com>
Date:   Fri, 8 Dec 2023 09:03:20 +0000
From:   TY_Chang[張子逸] <tychang@...ltek.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        "Andy Shevchenko" <andy@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>
CC:     "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v3 1/2] dt-bindings: gpio: realtek: Add realtek,rtd-gpio

Hi Krzysztof,

>> diff --git
>> a/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml
>> b/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml
>> new file mode 100644
>> index 000000000000..984e7dbd322e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml
>> @@ -0,0 +1,69 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright 2023
>> +Realtek Semiconductor Corporation %YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/gpio/realtek,rtd-gpio.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Realtek DHC GPIO controller
>> +
>> +maintainers:
>> +  - Tzuyi Chang <tychang@...ltek.com>
>> +
>> +description:
>> +  The GPIO controller is designed for the Realtek DHC (Digital Home
>> +Center)
>> +  RTD series SoC family, which are high-definition media processor SoCs.
>> +
>> +properties:
>> +  compatible:
>> +    enum:
>> +      - realtek,rtd1295-misc-gpio
>> +      - realtek,rtd1295-iso-gpio
>> +      - realtek,rtd1395-iso-gpio
>> +      - realtek,rtd1619-iso-gpio
>> +      - realtek,rtd1319-iso-gpio
>> +      - realtek,rtd1619b-iso-gpio
>> +      - realtek,rtd1319d-iso-gpio
>> +      - realtek,rtd1315e-iso-gpio
>
>If there is going to be resend, please order this list alphanumerically.
>

I will revise it in the next version

>> +
>> +  reg:
>> +    items:
>> +      - description: GPIO controller registers
>> +      - description: GPIO interrupt registers
>> +
>
>...
>
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    gpio@100 {
>> +      compatible = "realtek,rtd1319d-iso-gpio";
>> +      reg = <0x100 0x100>,
>> +            <0x000 0x0b0>;
>
>That's odd. Why order is decreasing? Isn't 0x0 the address of the SoC (soc@0)?
>

The DTS use in our platform follows this structure:

soc@0 {
    rbus: rbus@...00000 {
	    ...
        iso: syscon@...0 {
		    ...
            gpio: gpio@100 {
                compatible = "realtek,rtd1319d-iso-gpio";
                reg = <0x100 0x100>,
                      <0x000 0x0b0>;
                interrupt-parent = <&iso_irq_mux>;
                interrupts = <19>, <20>;
                gpio-ranges = <&pinctrl 0 0 82>;
                gpio-controller;
                #gpio-cells = <2>;
            };
        };
    };
};

The base address for the GPIO controller is 0x98007100. The second line of
'reg' refers to the GPIO interrupt status registers, which are distributed
within the range of 0x98007000 to 0x980070AF. Would it be advisable to fetch the
syscon from parent node(iso: syscon@...0) to handle the GPIO interrupt status
registers?

>It is, btw, 0x0, not 0x000. The same for 0x0b0 -> 0xb0, unless you want to pad
>to full word.
>

I will revise it in the next version.

Thanks,
Tzuyi Chang