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Message-ID: <e128d826-0a62-4e7e-b8d3-2a7d2ef30f62@amd.com>
Date: Wed, 13 Dec 2023 16:44:57 +0100
From: Michal Simek <michal.simek@....com>
To: conor@...nel.org, linux-kernel@...r.kernel.org, monstr@...str.eu,
michal.simek@...inx.com, git@...inx.com, robh@...nel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Damien Le Moal <dlemoal@...nel.org>,
Jassi Brar <jassisinghbrar@...il.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Mark Brown <broonie@...nel.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v4 1/2] dt-bindings: soc: xilinx: Move xilinx.yaml from
arm to soc
On 11/23/23 08:02, Michal Simek wrote:
> All Xilinx boards can hosts also soft core CPUs like MicroBlaze or
> MicroBlaze V (RISC-V ISA) that's why move boards description from arm
> folder to soc folder.
> Similar change was done for Renesas by commit c27ce08b806d ("dt-bindings:
> soc: renesas: Move renesas.yaml from arm to soc").
>
> Signed-off-by: Michal Simek <michal.simek@....com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> ---
>
> Changes in v4:
> - s/chagne/change/ in commit message
> - Fix binding location
>
> Changes in v3:
> - Fix commit message reported by Krzysztof and add his ACK
>
> Changes in v2:
> - New patch in the series
>
> Based on discussion here.
> https://lore.kernel.org/r/20231108-copper-scoff-b4de5febb954@spud
>
> ---
> .../devicetree/bindings/{arm => soc/xilinx}/xilinx.yaml | 2 +-
> MAINTAINERS | 1 +
> 2 files changed, 2 insertions(+), 1 deletion(-)
> rename Documentation/devicetree/bindings/{arm => soc/xilinx}/xilinx.yaml (98%)
>
> diff --git a/Documentation/devicetree/bindings/arm/xilinx.yaml b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
> similarity index 98%
> rename from Documentation/devicetree/bindings/arm/xilinx.yaml
> rename to Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
> index f57ed0347894..95758deca325 100644
> --- a/Documentation/devicetree/bindings/arm/xilinx.yaml
> +++ b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
> @@ -1,7 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
> %YAML 1.2
> ---
> -$id: http://devicetree.org/schemas/arm/xilinx.yaml#
> +$id: http://devicetree.org/schemas/soc/xilinx/xilinx.yaml#
> $schema: http://devicetree.org/meta-schemas/core.yaml#
>
> title: Xilinx Zynq Platforms
> diff --git a/MAINTAINERS b/MAINTAINERS
> index ea790149af79..14ad00009a63 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -3020,6 +3020,7 @@ F: Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
> F: Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml
> F: Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
> F: Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml
> +F: Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
> F: Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml
> F: arch/arm/mach-zynq/
> F: drivers/clocksource/timer-cadence-ttc.c
Applied.
M
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