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Message-ID: <CAJM55Z-BJMi=rbe8op5EQ-efwo-9AbmavVE1BVJ9_xuHQzMhLQ@mail.gmail.com>
Date: Wed, 13 Dec 2023 04:39:11 -0800
From: Emil Renner Berthing <emil.renner.berthing@...onical.com>
To: Emil Renner Berthing <emil.renner.berthing@...onical.com>,
Sia Jee Heng <jeeheng.sia@...rfivetech.com>, kernel@...il.dk,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
krzk@...nel.org, conor+dt@...nel.org, paul.walmsley@...ive.com,
palmer@...belt.com, aou@...s.berkeley.edu,
daniel.lezcano@...aro.org, tglx@...utronix.de, conor@...nel.org,
anup@...infault.org, gregkh@...uxfoundation.org,
jirislaby@...nel.org, michal.simek@....com,
michael.zhu@...rfivetech.com, drew@...gleboard.org
Cc: devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, leyfoon.tan@...rfivetech.com
Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100
device tree
Emil Renner Berthing wrote:
> Sia Jee Heng wrote:
> > Add initial device tree for the StarFive JH8100 RISC-V SoC.
> >
> > Signed-off-by: Sia Jee Heng <jeeheng.sia@...rfivetech.com>
> > Reviewed-by: Ley Foon Tan <leyfoon.tan@...rfivetech.com>
>
> Looks good to me, thanks.
>
> Acked-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
I just learned that this JH8100 is not actually a real SoC yet but just an FPGA
implementation, and no indication that that's actually a product that will be
mass produced. Hence a lot of details may change before it becomes a real
SoC/product people can buy, so let's not add this device tree yet before
everything is set in silicon.
Please consider my Acked-by abeve revoked.
Sia Jee Heng: With that said I still think it's super awesome that you're
beginning upstreaming support for your new SoCs early. I wish more SoC vendors
would follow your example.
/Emil
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