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Message-ID: <20231211-vacant-tracing-0f5bfc3b23fd@spud>
Date:   Mon, 11 Dec 2023 17:43:17 +0000
From:   Conor Dooley <conor@...nel.org>
To:     JeeHeng Sia <jeeheng.sia@...rfivetech.com>
Cc:     Conor Dooley <conor.dooley@...rochip.com>,
        Shengyu Qu <wiagn233@...look.com>,
        "kernel@...il.dk" <kernel@...il.dk>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "krzk@...nel.org" <krzk@...nel.org>,
        "conor+dt@...nel.org" <conor+dt@...nel.org>,
        "paul.walmsley@...ive.com" <paul.walmsley@...ive.com>,
        "palmer@...belt.com" <palmer@...belt.com>,
        "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
        "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "anup@...infault.org" <anup@...infault.org>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "jirislaby@...nel.org" <jirislaby@...nel.org>,
        "michal.simek@....com" <michal.simek@....com>,
        Michael Zhu <michael.zhu@...rfivetech.com>,
        "drew@...gleboard.org" <drew@...gleboard.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Leyfoon Tan <leyfoon.tan@...rfivetech.com>
Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100
 device tree

On Mon, Dec 11, 2023 at 09:38:03AM +0000, JeeHeng Sia wrote:
> 
> 
> > -----Original Message-----
> > From: Conor Dooley <conor.dooley@...rochip.com>
> > Sent: Monday, December 11, 2023 3:59 PM
> > To: JeeHeng Sia <jeeheng.sia@...rfivetech.com>
> > Cc: Shengyu Qu <wiagn233@...look.com>; kernel@...il.dk; robh+dt@...nel.org; krzysztof.kozlowski+dt@...aro.org;
> > krzk@...nel.org; conor+dt@...nel.org; paul.walmsley@...ive.com; palmer@...belt.com; aou@...s.berkeley.edu;
> > daniel.lezcano@...aro.org; tglx@...utronix.de; conor@...nel.org; anup@...infault.org; gregkh@...uxfoundation.org;
> > jirislaby@...nel.org; michal.simek@....com; Michael Zhu <michael.zhu@...rfivetech.com>; drew@...gleboard.org;
> > devicetree@...r.kernel.org; linux-riscv@...ts.infradead.org; linux-kernel@...r.kernel.org; Leyfoon Tan
> > <leyfoon.tan@...rfivetech.com>
> > Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree
> > 
> > On Mon, Dec 11, 2023 at 01:38:06AM +0000, JeeHeng Sia wrote:
> > >
> > > > From: Shengyu Qu <wiagn233@...look.com>
> > > > Sent: Friday, December 8, 2023 8:09 PM
> > 
> > > > Does the dubhe-80 cores actually support vector? Or vector support
> > > >
> > > > doesn't exist on actual silicon?
> > 
> > > We don't have a use case for vector application in JH8100
> > 
> > I am sorry, but I am not clear on what this means. Do the CPUs on
> > the JH8100 support vector or not?
> The JH8100 CPU does not support vector operation.

Thanks for clarifiying.

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