linux-kernel - Re: (subset) [PATCH v2 0/8] Add JH7100 errata and update device tree

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Date: Fri, 15 Dec 2023 11:13:07 -0800
From: Emil Renner Berthing <emil.renner.berthing@...onical.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>, Conor Dooley <conor@...nel.org>
Cc: linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, 
	Emil Renner Berthing <emil.renner.berthing@...onical.com>, 
	Conor Dooley <conor.dooley@...rochip.com>, Paul Walmsley <paul.walmsley@...ive.com>, 
	Palmer Dabbelt <palmer@...belt.com>, Emil Renner Berthing <kernel@...il.dk>, Rob Herring <robh+dt@...nel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, 
	Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
Subject: Re: (subset) [PATCH v2 0/8] Add JH7100 errata and update device tree

Geert Uytterhoeven wrote:
> Hi Conor,
>
> On Wed, Dec 13, 2023 at 4:43 PM Conor Dooley <conor@...nel.org> wrote:
> > From: Conor Dooley <conor.dooley@...rochip.com>
> >
> > On Thu, 30 Nov 2023 16:19:24 +0100, Emil Renner Berthing wrote:
> > > Now that the driver for the SiFive cache controller supports manual
> > > flushing as non-standard cache operations[1] we can add an errata option
> > > for the StarFive JH7100 SoC and update the device tree with the cache
> > > controller, dedicated DMA pool and add MMC nodes for the SD-card and
> > > wifi.
> > >
> > > This series needs the following commit in [1] to work properly:
> > >
> > > [...]
> >
> > Applied to riscv-cache-for-next, thanks!
> >
> > [1/8] riscv: errata: Add StarFive JH7100 errata
> >       https://git.kernel.org/conor/c/64fc984a8a54
>
> That's the one which also needs depends on !DMA_DIRECT_REMAP?

Yes, thanks. I sent a fix now:
https://lore.kernel.org/linux-riscv/20231215190909.3722757-1-emil.renner.berthing@canonical.com/

/Emil