linux-kernel - Re: [PATCH v2 1/3] mailbox: mtk-cmdq: Rename gce

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Message-ID: <7a5b2c164c0c8dc6b1ac0742c6f3cf2b4a4ca7a6.camel@mediatek.com>
Date: Fri, 15 Dec 2023 09:06:20 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: "jassisinghbrar@...il.com" <jassisinghbrar@...il.com>,
	Jason-JH Lin (林睿祥) <Jason-JH.Lin@...iatek.com>,
	"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>,
	"angelogioacchino.delregno@...labora.com"
	<angelogioacchino.delregno@...labora.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
	Singo Chang (張興國) <Singo.Chang@...iatek.com>,
	Johnson Wang (王聖鑫) <Johnson.Wang@...iatek.com>,
	Jason-ch Chen (陳建豪)
	<Jason-ch.Chen@...iatek.com>, Shawn Sung (宋孝謙)
	<Shawn.Sung@...iatek.com>, Nancy Lin (林欣螢)
	<Nancy.Lin@...iatek.com>, "jkardatzke@...gle.com" <jkardatzke@...gle.com>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@...iatek.com>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "matthias.bgg@...il.com"
	<matthias.bgg@...il.com>
Subject: Re: [PATCH v2 1/3] mailbox: mtk-cmdq: Rename gce_plat variable with
 SoC name postfix

On Fri, 2023-12-15 at 15:00 +0800, Jason-JH.Lin wrote:
> Rename gce_plat variable postfix from 'v1~v7' to SoC names.

Reviewed-by: CK Hu <ck.hu@...iatek.com>

> 
> Signed-off-by: Jason-JH.Lin <jason-jh.lin@...iatek.com>
> ---
>  drivers/mailbox/mtk-cmdq-mailbox.c | 24 ++++++++++++------------
>  1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
> b/drivers/mailbox/mtk-cmdq-mailbox.c
> index de862e9137d5..16c504f8d9d5 100644
> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> @@ -706,42 +706,42 @@ static const struct dev_pm_ops cmdq_pm_ops = {
>  			   cmdq_runtime_resume, NULL)
>  };
>  
> -static const struct gce_plat gce_plat_v2 = {
> +static const struct gce_plat gce_plat_mt8173 = {
>  	.thread_nr = 16,
>  	.shift = 0,
>  	.control_by_sw = false,
>  	.gce_num = 1
>  };
>  
> -static const struct gce_plat gce_plat_v3 = {
> +static const struct gce_plat gce_plat_mt8183 = {
>  	.thread_nr = 24,
>  	.shift = 0,
>  	.control_by_sw = false,
>  	.gce_num = 1
>  };
>  
> -static const struct gce_plat gce_plat_v4 = {
> +static const struct gce_plat gce_plat_mt6779 = {
>  	.thread_nr = 24,
>  	.shift = 3,
>  	.control_by_sw = false,
>  	.gce_num = 1
>  };
>  
> -static const struct gce_plat gce_plat_v5 = {
> +static const struct gce_plat gce_plat_mt8192 = {
>  	.thread_nr = 24,
>  	.shift = 3,
>  	.control_by_sw = true,
>  	.gce_num = 1
>  };
>  
> -static const struct gce_plat gce_plat_v6 = {
> +static const struct gce_plat gce_plat_mt8195 = {
>  	.thread_nr = 24,
>  	.shift = 3,
>  	.control_by_sw = true,
>  	.gce_num = 2
>  };
>  
> -static const struct gce_plat gce_plat_v7 = {
> +static const struct gce_plat gce_plat_mt8186 = {
>  	.thread_nr = 24,
>  	.shift = 3,
>  	.control_by_sw = true,
> @@ -750,12 +750,12 @@ static const struct gce_plat gce_plat_v7 = {
>  };
>  
>  static const struct of_device_id cmdq_of_ids[] = {
> -	{.compatible = "mediatek,mt8173-gce", .data = (void
> *)&gce_plat_v2},
> -	{.compatible = "mediatek,mt8183-gce", .data = (void
> *)&gce_plat_v3},
> -	{.compatible = "mediatek,mt8186-gce", .data = (void
> *)&gce_plat_v7},
> -	{.compatible = "mediatek,mt6779-gce", .data = (void
> *)&gce_plat_v4},
> -	{.compatible = "mediatek,mt8192-gce", .data = (void
> *)&gce_plat_v5},
> -	{.compatible = "mediatek,mt8195-gce", .data = (void
> *)&gce_plat_v6},
> +	{.compatible = "mediatek,mt8173-gce", .data = (void
> *)&gce_plat_mt8173},
> +	{.compatible = "mediatek,mt8183-gce", .data = (void
> *)&gce_plat_mt8183},
> +	{.compatible = "mediatek,mt8186-gce", .data = (void
> *)&gce_plat_mt8186},
> +	{.compatible = "mediatek,mt6779-gce", .data = (void
> *)&gce_plat_mt6779},
> +	{.compatible = "mediatek,mt8192-gce", .data = (void
> *)&gce_plat_mt8192},
> +	{.compatible = "mediatek,mt8195-gce", .data = (void
> *)&gce_plat_mt8195},
>  	{}
>  };
>