linux-kernel - [PATCH v2 4/5] dmaengine: axi-dmac: Use only EOT interrupts when doing scatter-gather

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Message-ID: <20231215131313.23840-5-paul@crapouillou.net>
Date: Fri, 15 Dec 2023 14:13:12 +0100
From: Paul Cercueil <paul@...pouillou.net>
To: Vinod Koul <vkoul@...nel.org>
Cc: Lars-Peter Clausen <lars@...afoo.de>,
	Nuno Sá <noname.nuno@...il.com>,
	Michael Hennerich <Michael.Hennerich@...log.com>,
	dmaengine@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Paul Cercueil <paul@...pouillou.net>
Subject: [PATCH v2 4/5] dmaengine: axi-dmac: Use only EOT interrupts when doing scatter-gather

Instead of notifying userspace in the end-of-transfer (EOT) interrupt
and program the hardware in the start-of-transfer (SOT) interrupt, we
can do both things in the EOT, allowing us to mask the SOT, and halve
the number of interrupts sent by the HDL core.

Signed-off-by: Paul Cercueil <paul@...pouillou.net>

---
v2: Make sure cyclic buffers are restarted as well
---
 drivers/dma/dma-axi-dmac.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/dma-axi-dmac.c b/drivers/dma/dma-axi-dmac.c
index 5109530b66de..f63acae511fb 100644
--- a/drivers/dma/dma-axi-dmac.c
+++ b/drivers/dma/dma-axi-dmac.c
@@ -411,10 +411,12 @@ static bool axi_dmac_transfer_done(struct axi_dmac_chan *chan,
 	if (chan->hw_sg) {
 		if (active->cyclic) {
 			vchan_cyclic_callback(&active->vdesc);
+			start_next = true;
 		} else {
 			list_del(&active->vdesc.node);
 			vchan_cookie_complete(&active->vdesc);
 			active = axi_dmac_active_desc(chan);
+			start_next = !!active;
 		}
 	} else {
 		do {
@@ -1000,6 +1002,7 @@ static int axi_dmac_probe(struct platform_device *pdev)
 	struct axi_dmac *dmac;
 	struct regmap *regmap;
 	unsigned int version;
+	u32 irq_mask = 0;
 	int ret;
 
 	dmac = devm_kzalloc(&pdev->dev, sizeof(*dmac), GFP_KERNEL);
@@ -1067,7 +1070,10 @@ static int axi_dmac_probe(struct platform_device *pdev)
 
 	dma_dev->copy_align = (dmac->chan.address_align_mask + 1);
 
-	axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_MASK, 0x00);
+	if (dmac->chan.hw_sg)
+		irq_mask |= AXI_DMAC_IRQ_SOT;
+
+	axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_MASK, irq_mask);
 
 	if (of_dma_is_coherent(pdev->dev.of_node)) {
 		ret = axi_dmac_read(dmac, AXI_DMAC_REG_COHERENCY_DESC);
-- 
2.42.0