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Message-ID: <e8124f2cad7afbb4e9fbd777dda992f4.sboyd@kernel.org>
Date: Sun, 17 Dec 2023 15:52:17 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Alexandre Torgue <alexandre.torgue@...s.st.com>, Conor Dooley <conor+dt@...nel.org>, Gabriel Fernandez <gabriel.fernandez@...s.st.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Maxime Coquelin <mcoquelin.stm32@...il.com>, Michael Turquette <mturquette@...libre.com>, Philipp Zabel <p.zabel@...gutronix.de>, Rob Herring <robh+dt@...nel.org>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 4/5] clk: stm32: introduce clocks for STM32MP257 platform
Quoting gabriel.fernandez@...s.st.com (2023-12-08 06:36:59)
> diff --git a/drivers/clk/stm32/clk-stm32mp25.c b/drivers/clk/stm32/clk-stm32mp25.c
> new file mode 100644
> index 000000000000..36321fd6142e
> --- /dev/null
> +++ b/drivers/clk/stm32/clk-stm32mp25.c
> @@ -0,0 +1,1125 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
> + * Author: Gabriel Fernandez <gabriel.fernandez@...s.st.com> for STMicroelectronics.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>
> +#include <linux/delay.h>
Is this include used?
> +#include <linux/device.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/spinlock.h>
Is this include used?
> +
> +#include "clk-stm32-core.h"
> +#include "reset-stm32.h"
> +
> +#include <dt-bindings/clock/st,stm32mp25-rcc.h>
> +#include <dt-bindings/reset/st,stm32mp25-rcc.h>
> +
> +#include "stm32mp25_rcc.h"
> +
> +static const char * const adc12_src[] = {
> + "ck_flexgen_46", "ck_icn_ls_mcu"
Can we please migrate to struct clk_parent_data?
> +};
> +
> +static const char * const adc3_src[] = {
> + "ck_flexgen_47", "ck_icn_ls_mcu", "ck_flexgen_46"
> +};
> +
> +static const char * const usb2phy1_src[] = {
> + "ck_flexgen_57", "hse_div2_ck"
> +};
[...]
> + GATE_TIM4,
> + GATE_TIM5,
> + GATE_TIM6,
> + GATE_TIM7,
> + GATE_TIM8,
> + GATE_UART4,
> + GATE_UART5,
> + GATE_UART7,
> + GATE_UART8,
> + GATE_UART9,
> + GATE_USART1,
> + GATE_USART2,
> + GATE_USART3,
> + GATE_USART6,
> + GATE_USB2,
> + GATE_USB2PHY1,
> + GATE_USB2PHY2,
> + GATE_USB3DR,
> + GATE_USB3PCIEPHY,
> + GATE_USBTC,
> + GATE_VDEC,
> + GATE_VENC,
> + GATE_VREF,
> + GATE_WWDG1,
> + GATE_WWDG2,
> + GATE_NB
> +};
> +
> +#define GATE_CFG(id, _offset, _bit_idx, _offset_clr)\
> + [id] = {\
Please move these slashes out and align them.
> + .offset = (_offset),\
> + .bit_idx = (_bit_idx),\
> + .set_clr = (_offset_clr),\
> + }
> +
> +static const struct stm32_gate_cfg stm32mp25_gates[GATE_NB] = {
> + GATE_CFG(GATE_ADC12, RCC_ADC12CFGR, 1, 0),
> + GATE_CFG(GATE_ADC3, RCC_ADC3CFGR, 1, 0),
> + GATE_CFG(GATE_ADF1, RCC_ADF1CFGR, 1, 0),
> + GATE_CFG(GATE_CCI, RCC_CCICFGR, 1, 0),
> + GATE_CFG(GATE_CRC, RCC_CRCCFGR, 1, 0),
> + GATE_CFG(GATE_CRYP1, RCC_CRYP1CFGR, 1, 0),
[....]
> +
> +static struct clk_stm32_clock_data stm32mp25_clock_data = {
> + .gate_cpt = stm32mp25_cpt_gate,
> + .gates = stm32mp25_gates,
> + .muxes = stm32mp25_muxes,
> +};
> +
> +static struct clk_stm32_reset_data stm32mp25_reset_data = {
> + .reset_lines = stm32mp25_reset_cfg,
> + .nr_lines = ARRAY_SIZE(stm32mp25_reset_cfg),
> +};
> +
> +static struct stm32_rcc_match_data stm32mp25_data = {
const
> + .tab_clocks = stm32mp25_clock_cfg,
> + .num_clocks = ARRAY_SIZE(stm32mp25_clock_cfg),
> + .maxbinding = STM32MP25_LAST_CLK,
> + .clock_data = &stm32mp25_clock_data,
> + .reset_data = &stm32mp25_reset_data,
> +};
> +
> +static const struct of_device_id stm32mp25_match_data[] = {
> + {
> + .compatible = "st,stm32mp25-rcc",
> + .data = &stm32mp25_data,
> + },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, stm32mp25_match_data);
> +
> +static int stm32mp25_rcc_init(struct device *dev)
Please inline this function in the one call site.
> +{
> + void __iomem *base;
> + int ret;
> +
> + base = of_iomap(dev_of_node(dev), 0);
Use platform device APIs instead of OF specific ones.
> + if (!base) {
> + dev_err(dev, "%pOFn: unable to map resource", dev_of_node(dev));
Missing newline.
> + ret = -ENOMEM;
> + goto out;
> + }
> +
> + ret = stm32_rcc_init(dev, stm32mp25_match_data, base);
> +
> +out:
> + if (ret) {
> + if (base)
> + iounmap(base);
> +
> + of_node_put(dev_of_node(dev));
When did we get the node?
> + }
> +
> + return ret;
> +}
> +
> +static int get_clock_deps(struct device *dev)
> +{
> + static const char * const clock_deps_name[] = {
> + "hsi", "hse", "msi", "lsi", "lse",
> + };
> + size_t deps_size = sizeof(struct clk *) * ARRAY_SIZE(clock_deps_name);
> + struct clk **clk_deps;
> + int i;
> +
> + clk_deps = devm_kzalloc(dev, deps_size, GFP_KERNEL);
> + if (!clk_deps)
> + return -ENOMEM;
> +
> + for (i = 0; i < ARRAY_SIZE(clock_deps_name); i++) {
> + struct clk *clk;
> +
> + clk = of_clk_get_by_name(dev_of_node(dev), clock_deps_name[i]);
> +
> + if (IS_ERR(clk)) {
> + if (PTR_ERR(clk) != -EINVAL && PTR_ERR(clk) != -ENOENT)
> + return PTR_ERR(clk);
> + } else {
> + /* Device gets a reference count on the clock */
> + clk_deps[i] = devm_clk_get(dev, __clk_get_name(clk));
Is something using this clk_deps array?
> + clk_put(clk);
> + }
> + }
> +
> + return 0;
> +}
> +
> +static int stm32mp25_rcc_clocks_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + int ret = get_clock_deps(dev);
> +
> + if (!ret)
> + ret = stm32mp25_rcc_init(dev);
> +
> + return ret;
> +}
> +
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