linux-kernel - Re: [PATCH v5 1/5] iommu/arm-smmu: re-enable context caching in smmu reset operation

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Message-ID: <810ee42b-49c9-4184-b5aa-a95261faf77a@linaro.org>
Date: Tue, 19 Dec 2023 18:59:14 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Bibek Kumar Patro <quic_bibekkum@...cinc.com>, will@...nel.org,
 robin.murphy@....com, joro@...tes.org, dmitry.baryshkov@...aro.org,
 jsnitsel@...hat.com, quic_bjorande@...cinc.com, mani@...nel.org,
 quic_eberman@...cinc.com, robdclark@...omium.org,
 u.kleine-koenig@...gutronix.de, robh@...nel.org, vladimir.oltean@....com,
 quic_pkondeti@...cinc.com, quic_molvera@...cinc.com
Cc: linux-arm-msm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 iommu@...ts.linux.dev, linux-kernel@...r.kernel.org,
 qipl.kernel.upstream@...cinc.com
Subject: Re: [PATCH v5 1/5] iommu/arm-smmu: re-enable context caching in smmu
 reset operation

On 19.12.2023 14:59, Bibek Kumar Patro wrote:
> Default MMU-500 reset operation disables context caching in
> prefetch buffer. It is however expected for context banks using
> the ACTLR register to retain their prefetch value during reset
> and runtime suspend.
> 
> Replace default MMU-500 reset operation with Qualcomm specific reset
> operation which envelope the default reset operation and re-enables
> context caching in prefetch buffer for Qualcomm SoCs.
> 
> Suggested-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Suggested-by implies I came up with this being a solution to
an issue.. definitely not the case!

Konrad