[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <ccd67437-39cb-4fea-98aa-4dfae5f4c1d0@quicinc.com>
Date: Wed, 20 Dec 2023 13:38:23 +0530
From: Bibek Kumar Patro <quic_bibekkum@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@...aro.org>, <will@...nel.org>,
<robin.murphy@....com>, <joro@...tes.org>,
<dmitry.baryshkov@...aro.org>, <jsnitsel@...hat.com>,
<quic_bjorande@...cinc.com>, <mani@...nel.org>,
<quic_eberman@...cinc.com>, <robdclark@...omium.org>,
<u.kleine-koenig@...gutronix.de>, <robh@...nel.org>,
<vladimir.oltean@....com>, <quic_pkondeti@...cinc.com>,
<quic_molvera@...cinc.com>
CC: <linux-arm-msm@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
<iommu@...ts.linux.dev>, <linux-kernel@...r.kernel.org>,
<qipl.kernel.upstream@...cinc.com>
Subject: Re: [PATCH v5 1/5] iommu/arm-smmu: re-enable context caching in smmu
reset operation
On 12/19/2023 11:29 PM, Konrad Dybcio wrote:
> On 19.12.2023 14:59, Bibek Kumar Patro wrote:
>> Default MMU-500 reset operation disables context caching in
>> prefetch buffer. It is however expected for context banks using
>> the ACTLR register to retain their prefetch value during reset
>> and runtime suspend.
>>
>> Replace default MMU-500 reset operation with Qualcomm specific reset
>> operation which envelope the default reset operation and re-enables
>> context caching in prefetch buffer for Qualcomm SoCs.
>>
>> Suggested-by: Konrad Dybcio <konrad.dybcio@...aro.org>
> Suggested-by implies I came up with this being a solution to
> an issue.. definitely not the case!
>
Noted, will send v6 by removing the Suggested by tag
and will address the return check as well.
Thanks,
Bibek
> Konrad
Powered by blists - more mailing lists