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Message-ID: <bea6c2ed-c47b-4bbe-8cda-6e28fd2fcea8@linaro.org>
Date: Thu, 21 Dec 2023 09:04:04 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Jishnu Prakash <quic_jprakash@...cinc.com>, jic23@...nel.org,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
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Subject: Re: [PATCH V2 1/3] dt-bindings: iio: adc: Add QCOM PMIC5 Gen3 ADC
bindings
On 21/12/2023 09:00, Jishnu Prakash wrote:
> Hi Krzysztof,
>
> On 11/16/2023 5:13 PM, Krzysztof Kozlowski wrote:
>> On 16/11/2023 04:25, Jishnu Prakash wrote:
>>> For the PMIC5-Gen3 type PMICs, ADC peripheral is present in HW for the
>>> following PMICs: PMK8550, PM8550, PM8550B and PM8550VX PMICs.
>>>
>> A nit, subject: drop second/last, redundant "bindings". The
>> "dt-bindings" prefix is already stating that these are bindings.
>>
>>>
>>> reg:
>>> - description: VADC base address in the SPMI PMIC register map
>>> - maxItems: 1
>> NAK.
>>
>> I wrote it multiple times. You canno remove the widest constraints from
>> top-level property.
>>
>
>>> '#io-channel-cells':
>>> const: 1
>>>
>>> interrupts:
>>> - maxItems: 1
>> No, srsly. We went through it.
>
>
> Is it fine if I add the bindings for ADC5 Gen3 in a new file? It's not
> just for the reg and interrupts properties, I think it would make sense
> to have a new file as ADC5 Gen3 is a new device combining the functions
> of the existing QCOM VADC and ADC_TM devices.
>
The patch is no longer in my mailbox, that was more than a month ago.
Best regards,
Krzysztof
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