linux-kernel - Re: [PATCH V2 1/3] dt-bindings: iio: adc: Add QCOM PMIC5 Gen3 ADC bindings

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <716cf526-59e3-e755-0a47-ff9ae496e87c@quicinc.com>
Date: Thu, 21 Dec 2023 13:30:45 +0530
From: Jishnu Prakash <quic_jprakash@...cinc.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, <jic23@...nel.org>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <conor+dt@...nel.org>, <agross@...nel.org>, <andersson@...nel.org>,
        <konrad.dybcio@...aro.org>, <daniel.lezcano@...aro.org>,
        <dmitry.baryshkov@...aro.org>, <linus.walleij@...aro.org>,
        <linux-arm-msm@...r.kernel.org>, <andriy.shevchenko@...ux.intel.com>,
        <quic_subbaram@...cinc.com>, <quic_collinsd@...cinc.com>,
        <quic_amelende@...cinc.com>, <quic_kamalw@...cinc.com>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <marijn.suijten@...ainline.org>
CC: <lars@...afoo.de>, <luca@...tu.xyz>, <linux-iio@...r.kernel.org>,
        <lee@...nel.org>, <rafael@...nel.org>, <rui.zhang@...el.com>,
        <lukasz.luba@....com>, <cros-qcom-dts-watchers@...omium.org>,
        <sboyd@...nel.org>, <linux-pm@...r.kernel.org>,
        <linux-arm-msm-owner@...r.kernel.org>, <kernel@...cinc.com>
Subject: Re: [PATCH V2 1/3] dt-bindings: iio: adc: Add QCOM PMIC5 Gen3 ADC
 bindings

Hi Krzysztof,

On 11/16/2023 5:13 PM, Krzysztof Kozlowski wrote:
> On 16/11/2023 04:25, Jishnu Prakash wrote:
>> For the PMIC5-Gen3 type PMICs, ADC peripheral is present in HW for the
>> following PMICs: PMK8550, PM8550, PM8550B and PM8550VX PMICs.
>>
> A nit, subject: drop second/last, redundant "bindings". The
> "dt-bindings" prefix is already stating that these are bindings.
>
>>   
>>     reg:
>> -    description: VADC base address in the SPMI PMIC register map
>> -    maxItems: 1
> NAK.
>
> I wrote it multiple times. You canno remove the widest constraints from
> top-level property.
>

>>     '#io-channel-cells':
>>       const: 1
>>   
>>     interrupts:
>> -    maxItems: 1
> No, srsly. We went through it.


Is it fine if I add the bindings for ADC5 Gen3 in a new file? It's not 
just for the reg and interrupts properties, I think it would make sense 
to have a new file as ADC5 Gen3 is a new device combining the functions 
of the existing QCOM VADC and ADC_TM devices.


>
>
>> -    description:
>> +    description: |
>>         End of conversion interrupt.
>> +      - For compatible property "qcom,spmi-adc5-gen3", interrupts are defined
>> +        for each SDAM being used.
>> +
>> +  interrupt-names:
>> +    description: |
> You must describe the names which also provides constraints.


I'll update this in the next patchset.

Thanks,

Jishnu


>
> I am not going to review the rest of the file.
>
> Best regards,
> Krzysztof
>