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Date: Thu, 21 Dec 2023 15:59:56 +0530
From: Chintan Vankar <c-vankar@...com>
To: Maxime Ripard <mripard@...nel.org>,
        Uwe Kleine-König
	<u.kleine-koenig@...gutronix.de>,
        Sinthu Raja <sinthu.raja@...com>, Chintan
 Vankar <c-vankar@...com>,
        Andrew Davis <afd@...com>, Siddharth Vadapalli
	<s-vadapalli@...com>,
        Roger Quadros <rogerq@...nel.org>,
        Kishon Vijay Abraham
 I <kishon@...nel.org>,
        Vinod Koul <vkoul@...nel.org>
CC: <linux-kernel@...r.kernel.org>, <linux-phy@...ts.infradead.org>
Subject: [RFC PATCH 2/2] phy: ti: j721e-wiz: Add SGMII support in WIZ driver for J784S4

Enable full rate divider configuration support for J784S4_WIZ_10G
for SGMII.

Signed-off-by: Chintan Vankar <c-vankar@...com>
---
 drivers/phy/ti/phy-j721e-wiz.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index fc3cd98c60ff..00d7e6a6de03 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -1240,6 +1240,7 @@ static int wiz_phy_fullrt_div(struct wiz *wiz, int lane)
 	case J721E_WIZ_10G:
 	case J7200_WIZ_10G:
 	case J721S2_WIZ_10G:
+	case J784S4_WIZ_10G:
 		if (wiz->lane_phy_type[lane] == PHY_TYPE_SGMII)
 			return regmap_field_write(wiz->p0_fullrt_div[lane], 0x2);
 		break;
-- 
2.34.1


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