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Message-ID: <875y0rkpe1.fsf@mail.lhotse> Date: Fri, 22 Dec 2023 12:16:38 +1100 From: Michael Ellerman <mpe@...erman.id.au> To: Matthias Schiffer <matthias.schiffer@...tq-group.com>, Christophe Leroy <christophe.leroy@...roup.eu> Cc: Nicholas Piggin <npiggin@...il.com>, "Aneesh Kumar K.V" <aneesh.kumar@...nel.org>, "Naveen N. Rao" <naveen.n.rao@...ux.ibm.com>, linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org, linux@...tq-group.com, Matthias Schiffer <matthias.schiffer@...tq-group.com> Subject: Re: [PATCH] powerpc/6xx: set High BAT Enable flag on G2 cores Matthias Schiffer <matthias.schiffer@...tq-group.com> writes: > MMU_FTR_USE_HIGH_BATS is set for G2-based cores (G2_LE, e300cX), but the > high BATs need to be enabled in HID2 to work. Add register definitions > and introduce a G2 variant of __setup_cpu_603. > > This fixes boot on CPUs like the MPC5200B with STRICT_KERNEL_RWX enabled. Nice find. Minor nit on naming. The 32-bit code mostly uses the numeric names, eg. 603, 603e, 604 etc. Can we stick with that, rather than using "G2"? Wikipedia says G2 == 603e. But looking at your patch you're not changing all the 603e cores, so I guess it's not that clear cut? If using "G2" makes the most sense then it would be nice to update Documentation/arch/powerpc/cpu_families.rst to mention it (not asking you to do it necessarily, more a note for us). cheers
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