linux-kernel - Re: [PATCH v2 2/3] phy: qcom: qmp-pcie: Add QMP v6 registers layout

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Sun, 24 Dec 2023 08:22:52 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Abel Vesa <abel.vesa@...aro.org>
Cc: Andy Gross <agross@...nel.org>, Bjorn Andersson <andersson@...nel.org>, 
	Konrad Dybcio <konrad.dybcio@...aro.org>, Vinod Koul <vkoul@...nel.org>, 
	Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring <robh+dt@...nel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, 
	linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/3] phy: qcom: qmp-pcie: Add QMP v6 registers layout

On Sun, 24 Dec 2023 at 08:16, Dmitry Baryshkov
<dmitry.baryshkov@...aro.org> wrote:
>
> On Sat, 23 Dec 2023 at 13:55, Abel Vesa <abel.vesa@...aro.org> wrote:
> >
> > For consistency, add the QMP v6 registers layout even though
> > they are the same as v5. Also switch all QMP v6 PHYs to use this
> > new layout.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> > ---
> >  drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 13 ++++++++++---
> >  1 file changed, 10 insertions(+), 3 deletions(-)
>
> On Thu, 21 Dec 2023 at 05:51, Bjorn Andersson <quic_bjorande@...cinc.com> wrote:
> >
> > The SA8295P and SA8540P uses an external regulator (max20411), and
> > gfx.lvl is not provided by rpmh. Drop the power-domains property of the
> > gpucc node to reflect this.
> >
> > Fixes: eec51ab2fd6f ("arm64: dts: qcom: sc8280xp: Add GPU related nodes")
> > Signed-off-by: Bjorn Andersson <quic_bjorande@...cinc.com>
> > ---
> >  arch/arm64/boot/dts/qcom/sa8540p.dtsi | 2 ++
> >  1 file changed, 2 insertions(+)

To resolve possible questions, the lines above got c&p-ed from another
email. The R-B tag is applicable to the patch in question (v6 regs
layout).

>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>
> --
> With best wishes
> Dmitry



-- 
With best wishes
Dmitry

On Sun, 24 Dec 2023 at 08:16, Dmitry Baryshkov
<dmitry.baryshkov@...aro.org> wrote:
>
> On Sat, 23 Dec 2023 at 13:55, Abel Vesa <abel.vesa@...aro.org> wrote:
> >
> > For consistency, add the QMP v6 registers layout even though
> > they are the same as v5. Also switch all QMP v6 PHYs to use this
> > new layout.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> > ---
> >  drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 13 ++++++++++---
> >  1 file changed, 10 insertions(+), 3 deletions(-)
>
> On Thu, 21 Dec 2023 at 05:51, Bjorn Andersson <quic_bjorande@...cinc.com> wrote:
> >
> > The SA8295P and SA8540P uses an external regulator (max20411), and
> > gfx.lvl is not provided by rpmh. Drop the power-domains property of the
> > gpucc node to reflect this.
> >
> > Fixes: eec51ab2fd6f ("arm64: dts: qcom: sc8280xp: Add GPU related nodes")
> > Signed-off-by: Bjorn Andersson <quic_bjorande@...cinc.com>
> > ---
> >  arch/arm64/boot/dts/qcom/sa8540p.dtsi | 2 ++
> >  1 file changed, 2 insertions(+)
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>
> --
> With best wishes
> Dmitry



-- 
With best wishes
Dmitry