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Message-Id: <170607604322.409477.15738588939361741186.b4-ty@kernel.org>
Date: Wed, 24 Jan 2024 11:30:43 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Andy Gross <agross@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Abel Vesa <abel.vesa@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH v2 0/3] phy: qcom: qmp-pcie: Add support for G3/G4 PCIe
PHY for X1E80100
On Sat, 23 Dec 2023 13:55:20 +0200, Abel Vesa wrote:
> This patchset adds the G4 tables and G4/G3 compatibles for X1E80100
> platforms. Also adds the pciphy_v6_regs_layout to be used by the G4x2
> phy and switches all the old QMP v6 PHYs to use the new regs layout.
>
>
Applied, thanks!
[1/3] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHYs
commit: e94b29f2bd73db149ce7fee9a41a7b6ca17f7918
[2/3] phy: qcom: qmp-pcie: Add QMP v6 registers layout
commit: 70e0af37e81e8a19e207ccf14953109d793087cb
[3/3] phy: qcom-qmp-pcie: Add support for X1E80100 g3x2 and g4x2 PCIE
commit: 606060ce8fd09891d97358e35fb2d2c00c787449
Best regards,
--
~Vinod
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