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Message-Id: <1703575199-23638-1-git-send-email-william.wu@rock-chips.com>
Date: Tue, 26 Dec 2023 15:19:59 +0800
From: William Wu <william.wu@...k-chips.com>
To: hminas@...opsys.com,
	gregkh@...uxfoundation.org
Cc: linux-usb@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	william.wu@...k-chips.com,
	frank.wang@...k-chips.com,
	jianwei.zheng@...k-chips.com,
	yangbin@...k-chips.com
Subject: [PATCH] usb: dwc2: Disable clock gating feature on Rockchip SoCs

The DWC2 IP on the Rockchip SoCs doesn't support clock gating.
When a clock gating is enabled, system hangs.

Signed-off-by: William Wu <william.wu@...k-chips.com>
---
 drivers/usb/dwc2/params.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index fb03162..eb677c3 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -130,6 +130,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
 	p->lpm_clock_gating = false;
 	p->besl = false;
 	p->hird_threshold_en = false;
+	p->no_clock_gating = true;
 }
 
 static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
-- 
2.0.0


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