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Message-ID: <7e6ccec1-2e4d-97c0-8a85-e38bad11f056@synopsys.com>
Date: Tue, 26 Dec 2023 07:26:22 +0000
From: Minas Harutyunyan <Minas.Harutyunyan@...opsys.com>
To: William Wu <william.wu@...k-chips.com>,
        Minas Harutyunyan <Minas.Harutyunyan@...opsys.com>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>
CC: "linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "frank.wang@...k-chips.com" <frank.wang@...k-chips.com>,
        "jianwei.zheng@...k-chips.com" <jianwei.zheng@...k-chips.com>,
        "yangbin@...k-chips.com" <yangbin@...k-chips.com>
Subject: Re: [PATCH] usb: dwc2: Disable clock gating feature on Rockchip SoCs

Hi,

On 12/26/23 11:19, William Wu wrote:
> The DWC2 IP on the Rockchip SoCs doesn't support clock gating.
> When a clock gating is enabled, system hangs.
> 
> Signed-off-by: William Wu <william.wu@...k-chips.com>

Acked-by: Minas Harutyunyan <hminas@...opsys.com>

> ---
>   drivers/usb/dwc2/params.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index fb03162..eb677c3 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -130,6 +130,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
>   	p->lpm_clock_gating = false;
>   	p->besl = false;
>   	p->hird_threshold_en = false;
> +	p->no_clock_gating = true;
>   }
>   
>   static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)

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