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Message-ID: <f61963cc-dc1a-4f0d-84cf-da7b145b1617@linaro.org>
Date: Tue, 26 Dec 2023 14:33:04 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Sia Jee Heng <jeeheng.sia@...rfivetech.com>, kernel@...il.dk,
conor@...nel.org, robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu,
mturquette@...libre.com, sboyd@...nel.org, p.zabel@...gutronix.de,
emil.renner.berthing@...onical.com, hal.feng@...rfivetech.com,
xingyu.wu@...rfivetech.com
Cc: linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
leyfoon.tan@...rfivetech.com
Subject: Re: [RFC 00/16] Basic clock and reset support for StarFive JH8100
RISC-V SoC
On 26/12/2023 06:38, Sia Jee Heng wrote:
>
> Patch 16 adds clocks and reset nodes to the JH8100 device tree.
>
> Changes since [2]:
Then this is v2, please version your patches correctly, so tools and
people will understand it.
Best regards,
Krzysztof
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