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Message-ID: <22984c59-08d3-4c67-9b6e-ef03e46f71a7@linaro.org>
Date: Tue, 26 Dec 2023 14:34:15 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Sia Jee Heng <jeeheng.sia@...rfivetech.com>, kernel@...il.dk,
conor@...nel.org, robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu,
mturquette@...libre.com, sboyd@...nel.org, p.zabel@...gutronix.de,
emil.renner.berthing@...onical.com, hal.feng@...rfivetech.com,
xingyu.wu@...rfivetech.com
Cc: linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
leyfoon.tan@...rfivetech.com
Subject: Re: [RFC 05/16] dt-bindings: clock: Add StarFive JH8100 System clock
and reset generator
On 26/12/2023 06:38, Sia Jee Heng wrote:
> Add bindings for the System clocks and reset generator (SYSCRG) on
> JH8100 SoC.
>
> Signed-off-by: Sia Jee Heng <jeeheng.sia@...rfivetech.com>
> Reviewed-by: Ley Foon Tan <leyfoon.tan@...rfivetech.com>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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