linux-kernel - Re: [PATCH v3 24/24] platform/chrome: cros_ec: Use PM subsystem to manage wakeirq

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <ZYvDshfJ-jnWNEY5@google.com>
Date: Wed, 27 Dec 2023 14:26:58 +0800
From: Tzung-Bi Shih <tzungbi@...nel.org>
To: Mark Hasemeyer <markhas@...omium.org>
Cc: LKML <linux-kernel@...r.kernel.org>,
	AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
	Rob Herring <robh@...nel.org>,
	Konrad Dybcio <konrad.dybcio@...aro.org>,
	Sudeep Holla <sudeep.holla@....com>,
	Andy Shevchenko <andriy.shevchenko@...el.com>,
	Raul Rangel <rrangel@...omium.org>,
	Benson Leung <bleung@...omium.org>,
	Bhanu Prakash Maiya <bhanumaiya@...omium.org>,
	Chen-Yu Tsai <wenst@...omium.org>,
	Guenter Roeck <groeck@...omium.org>, Lee Jones <lee@...nel.org>,
	Prashant Malani <pmalani@...omium.org>,
	Rob Barnes <robbarnes@...gle.com>,
	Stephen Boyd <swboyd@...omium.org>, chrome-platform@...ts.linux.dev
Subject: Re: [PATCH v3 24/24] platform/chrome: cros_ec: Use PM subsystem to
 manage wakeirq

On Tue, Dec 26, 2023 at 12:21:28PM -0700, Mark Hasemeyer wrote:
> The cros ec driver is manually managing the wake IRQ by calling
> enable_irq_wake()/disable_irq_wake() during suspend/resume.
> 
> Modify the driver to use the power management subsystem to manage the
> wakeirq.
> 
> Rather than assuming that the IRQ is wake capable, use the underlying
> firmware/device tree to determine whether or not to enable it as a wake
> source. Some Chromebooks rely solely on the ec_sync pin to wake the AP
> but do not specify the interrupt as wake capable in the ACPI _CRS. For
> LPC/ACPI based systems a DMI quirk is introduced listing boards whose
> firmware should not be trusted to provide correct wake capable values.
> For device tree base systems, it is not an issue as the relevant device
> tree entries have been updated and DTS is built from source for each
> ChromeOS update.
> 
> Signed-off-by: Mark Hasemeyer <markhas@...omium.org>

The patch overall looks good to me.

With some minor comments:
Acked-by: Tzung-Bi Shih <tzungbi@...nel.org>

> diff --git a/drivers/platform/chrome/cros_ec_uart.c b/drivers/platform/chrome/cros_ec_uart.c
[...]
>  static int cros_ec_uart_acpi_probe(struct cros_ec_uart *ec_uart)
>  {
[...]
>  	/* Retrieve GpioInt and translate it to Linux IRQ number */
> -	ret = acpi_dev_gpio_irq_get(adev, 0);
> +	ret = acpi_dev_get_gpio_irq_resource(adev, NULL, 0, &irqres);
>  	if (ret < 0)
>  		return ret;
>  
> -	ec_uart->irq = ret;
> -	dev_dbg(&ec_uart->serdev->dev, "IRQ number %d\n", ec_uart->irq);
> +	ec_uart->irq = irqres.start;

How about keep using `ret`?

> @@ -301,7 +306,14 @@ static int cros_ec_uart_probe(struct serdev_device *serdev)
>  
>  	serdev_device_set_client_ops(serdev, &cros_ec_uart_client_ops);
>  
> -	return cros_ec_register(ec_dev);
> +	/* Register a new cros_ec device */
> +	ret = cros_ec_register(ec_dev);
> +	if (ret) {
> +		dev_err(dev, "Couldn't register ec_dev (%d)\n", ret);
> +		return ret;
> +	}

It doesn't need the change after moving device_init_wakeup() and
dev_pm_set_wake_irq() into cros_ec_register().

Drop it?