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Message-ID: <45cba9bf1af74128b4d77bea3e11ce69@EXMBX066.cuchost.com> Date: Wed, 27 Dec 2023 10:51:38 +0000 From: JeeHeng Sia <jeeheng.sia@...rfivetech.com> To: Samuel Holland <samuel.holland@...ive.com> CC: "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>, "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>, Leyfoon Tan <leyfoon.tan@...rfivetech.com>, "kernel@...il.dk" <kernel@...il.dk>, "conor@...nel.org" <conor@...nel.org>, "robh+dt@...nel.org" <robh+dt@...nel.org>, "krzysztof.kozlowski+dt@...aro.org" <krzysztof.kozlowski+dt@...aro.org>, "paul.walmsley@...ive.com" <paul.walmsley@...ive.com>, "palmer@...belt.com" <palmer@...belt.com>, "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>, "mturquette@...libre.com" <mturquette@...libre.com>, "sboyd@...nel.org" <sboyd@...nel.org>, "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>, "emil.renner.berthing@...onical.com" <emil.renner.berthing@...onical.com>, Hal Feng <hal.feng@...rfivetech.com>, Xingyu Wu <xingyu.wu@...rfivetech.com> Subject: RE: [RFC 07/16] dt-bindings: clock: Add StarFive JH8100 North-West clock and reset generator > -----Original Message----- > From: Samuel Holland <samuel.holland@...ive.com> > Sent: Wednesday, December 27, 2023 2:07 AM > To: JeeHeng Sia <jeeheng.sia@...rfivetech.com> > Cc: linux-riscv@...ts.infradead.org; devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; linux-clk@...r.kernel.org; Leyfoon Tan > <leyfoon.tan@...rfivetech.com>; kernel@...il.dk; conor@...nel.org; robh+dt@...nel.org; krzysztof.kozlowski+dt@...aro.org; > paul.walmsley@...ive.com; palmer@...belt.com; aou@...s.berkeley.edu; mturquette@...libre.com; sboyd@...nel.org; > p.zabel@...gutronix.de; emil.renner.berthing@...onical.com; Hal Feng <hal.feng@...rfivetech.com>; Xingyu Wu > <xingyu.wu@...rfivetech.com> > Subject: Re: [RFC 07/16] dt-bindings: clock: Add StarFive JH8100 North-West clock and reset generator > > On 2023-12-25 11:38 PM, Sia Jee Heng wrote: > > Add bindings for the North-West clock and reset generator (NWCRG) on > > JH8100 SoC. > > > > Signed-off-by: Sia Jee Heng <jeeheng.sia@...rfivetech.com> > > Reviewed-by: Ley Foon Tan <leyfoon.tan@...rfivetech.com> > > --- > > .../bindings/clock/starfive,jh8100-nwcrg.yaml | 119 ++++++++++++++++++ > > .../dt-bindings/clock/starfive,jh8100-crg.h | 43 +++++++ > > .../dt-bindings/reset/starfive,jh8100-crg.h | 14 +++ > > 3 files changed, 176 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh8100-nwcrg.yaml > > > > diff --git a/Documentation/devicetree/bindings/clock/starfive,jh8100-nwcrg.yaml > b/Documentation/devicetree/bindings/clock/starfive,jh8100-nwcrg.yaml > > new file mode 100644 > > index 000000000000..be0f94e64e6a > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/starfive,jh8100-nwcrg.yaml > > @@ -0,0 +1,119 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/starfive,jh8100-nwcrg.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: StarFive JH8100 North-West Clock and Reset Generator > > + > > +maintainers: > > + - Sia Jee Heng <jeeheng.sia@...rfivetech.com> > > + > > +properties: > > + compatible: > > + const: starfive,jh8100-nwcrg > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: Main Oscillator (24 MHz) > > + - description: APB_BUS clock from SYSCRG > > + - description: APB_BUS_PER4 clock from SYSCRG > > + - description: SPI_CORE_100 clock from SYSCRG > > + - description: ISP_2X clock from SYSCRG > > + - description: ISP_AXI clock from SYSCRG > > + - description: VOUT_ROOT0 clock from SYSCRG > > + - description: VOUT_ROOT1 clock from SYSCRG > > + - description: VOUT_SCAN_ATS clock from SYSCRG > > + - description: VOUT_DC_CORE clock from SYSCRG > > + - description: VOUT_AXI clock from SYSCRG > > + - description: AXI_400 clock from SYSCRG > > + - description: AHB0 clock from SYSCRG > > + - description: PERH_ROOT_PREOSC from SYSCRG > > + - description: External DVP clock > > + - description: External ISP DPHY TAP TCK clock > > + - description: External golbal clock > > Typo: global Oops. Will fix it. Thanks. > > > + - description: External VOUT MIPI DPHY TAP TCK > > + - description: External VOUT eDP TAP TCK > > + - description: External SPI In2 clock > > + - description: PLL5 > > [...]
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