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Message-Id: <20231227-topic-8280_pcie_dts-v1-0-13d12b1698ff@linaro.org> Date: Wed, 27 Dec 2023 23:28:25 +0100 From: Konrad Dybcio <konrad.dybcio@...aro.org> To: Bjorn Andersson <andersson@...nel.org>, Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, Johan Hovold <johan+linaro@...nel.org> Cc: Marijn Suijten <marijn.suijten@...ainline.org>, linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, Konrad Dybcio <konrad.dybcio@...ainline.org>, Konrad Dybcio <konrad.dybcio@...aro.org> Subject: [PATCH 0/3] SC8280XP preparatory PCIe fixes Just a couple of minor fixes in preparation for PCIe shutdown (and by extension CX, AOSD and DDR power collapse - anybody here a fan of suspend?). If you want to test this on your machine, you're gonna need: - https://lore.kernel.org/all/20231227-topic-pmdomain_sync_cleanup-v1-1-5f36769d538b@linaro.org/ - https://lore.kernel.org/all/20231227-topic-psci_fw_sus-v1-0-6910add70bf3@linaro.org/ - https://lore.kernel.org/all/20231227-topic-8280_pcie-v1-0-095491baf9e4@linaro.org/ - All PCIe devices that require fw must be fully booted (so that they can be suspended) - You must not have any dangling resource votes (not the case on 8280-crd) Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org> --- Konrad Dybcio (3): arm64: dts: qcom: sc8280xp: Fix PCIe PHY power-domains arm64: dts: qcom: sc8280xp: Correct USB PHY power domains arm64: dts: qcom: sc8280xp-crd: Add PCIe CLKREQ# sleep state arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 78 ++++++++++++++++++++----------- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 +++---- 2 files changed, 60 insertions(+), 36 deletions(-) --- base-commit: 39676dfe52331dba909c617f213fdb21015c8d10 change-id: 20231227-topic-8280_pcie_dts-4d3a94efe6e7 Best regards, -- Konrad Dybcio <konrad.dybcio@...aro.org>
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