linux-kernel - Re: [PATCH v4 1/2] riscv: introduce RISCV_EFFICIENT_UNALIGNED

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Message-ID: <20231227042242.GA4240@quark.localdomain>
Date: Tue, 26 Dec 2023 22:22:42 -0600
From: Eric Biggers <ebiggers@...nel.org>
To: Jisheng Zhang <jszhang@...nel.org>
Cc: Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Conor Dooley <conor.dooley@...rochip.com>,
	Qingfang DENG <dqfext@...il.com>,
	Charlie Jenkins <charlie@...osinc.com>
Subject: Re: [PATCH v4 1/2] riscv: introduce RISCV_EFFICIENT_UNALIGNED_ACCESS

On Mon, Dec 25, 2023 at 12:42:06PM +0800, Jisheng Zhang wrote:
> Some riscv implementations such as T-HEAD's C906, C908, C910 and C920
> support efficient unaligned access, for performance reason we want
> to enable HAVE_EFFICIENT_UNALIGNED_ACCESS on these platforms. To
> avoid performance regressions on other non efficient unaligned access
> platforms, HAVE_EFFICIENT_UNALIGNED_ACCESS can't be globally selected.
> 
> To solve this problem, runtime code patching based on the detected
> speed is a good solution. But that's not easy, it involves lots of
> work to modify vairous subsystems such as net, mm, lib and so on.
> This can be done step by step.
> 
> So let's take an easier solution: add support to efficient unaligned
> access and hide the support under NONPORTABLE.
> 
> Now let's introduce RISCV_EFFICIENT_UNALIGNED_ACCESS which depends on
> NONPORTABLE, if users know during config time that the kernel will be
> only run on those efficient unaligned access hw platforms, they can
> enable it. Obviously, generic unified kernel Image shouldn't enable it.
> 
> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> Reviewed-by: Charlie Jenkins <charlie@...osinc.com>
> ---
>  arch/riscv/Kconfig  | 13 +++++++++++++
>  arch/riscv/Makefile |  2 ++
>  2 files changed, 15 insertions(+)

Reviewed-by: Eric Biggers <ebiggers@...gle.com>

- Eric