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Message-ID: <20231229171754.GD9098@thinkpad>
Date: Fri, 29 Dec 2023 22:47:54 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: David <david@...t.cz>
Cc: krzysztof.kozlowski@...aro.org, agross@...nel.org, andersson@...nel.org,
	bhelgaas@...gle.com, conor+dt@...nel.org,
	conor.dooley@...rochip.com, devicetree@...r.kernel.org,
	konrad.dybcio@...aro.org, krzysztof.kozlowski+dt@...aro.org,
	kw@...ux.com, linux-arm-msm@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
	lpieralisi@...nel.org, mani@...nel.org, robh@...nel.org
Subject: Re: [PATCH v2 1/2] dt-bindings: PCI: qcom: adjust iommu-map for
 different SoC

On Fri, Dec 29, 2023 at 04:36:31PM +0100, David wrote:
> > +    minItems: 1
> Hello Krzysztof,
> 
> the driver will accept 0 just fine, so I think this definition may be wrong.
> 

It's not entirely wrong but the actual SID mapping differs between SoCs.

> I sent just generic "dt-bindings: PCI: qcom: delimit number of iommu-map entries" which doesn't care about the numbers (in similar fashion as other bindings having iommu-map).
> 

No, we should not just ignore the MAX limit. If you add <N> number of entries
exceeding the max SID assigned to PCIe bus, it will fail.

- Mani

> Tell me what you think.
> 
> David
> 

-- 
மணிவண்ணன் சதாசிவம்

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