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Message-ID: <e299a7bd-2f50-41e0-a638-a1fbbeb65635@ixit.cz>
Date: Sat, 30 Dec 2023 00:18:37 +0100
From: David Heidelberg <david@...t.cz>
To: Luca Weiss <luca@...tu.xyz>, Bjorn Andersson <andersson@...nel.org>,
 Konrad Dybcio <konrad.dybcio@...aro.org>, Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>
Cc: Caleb Connolly <caleb.connolly@...aro.org>,
 linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, Manivannan Sadhasivam <mani@...nel.org>
Subject: Re: [PATCH] arm64: dts: qcom: sdm845: add power domain to UFS phy
 interface

On 29/12/2023 22:37, Luca Weiss wrote:

> On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote:
>> Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb`
>>
>> Signed-off-by: David Heidelberg <david@...t.cz>
>> ---
>>   arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb
>> 100644
>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@...7000 {
>>   			clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
>>   				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
>>
>> +			power-domains = <&gcc UFS_PHY_GDSC>;
>> +
>>   			resets = <&ufs_mem_hc 0>;
>>   			reset-names = "ufsphy";
> This is potentially the wrong power domain, see the conversation here:
> https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/
Thanks, I was thinking about  SDM845_MX, but then looked at rest more 
closer qcom archs and thought it'll be likely GDSC (also by looking at 
ufs_mem_hc reset vectors).
>
> Hopefully Mani can give some input here :)
>
> Regards
> Luca
>
>
-- 
David Heidelberg


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