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Message-Id: <20231229074508.2709093-3-JJLIU0@nuvoton.com>
Date: Fri, 29 Dec 2023 15:45:07 +0800
From: jim.t90615@...il.com
To: JJLIU0@...oton.com,
KWLIU@...oton.com,
jim.t90615@...il.com,
linus.walleij@...aro.org,
brgl@...ev.pl,
andy@...nel.org,
robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org
Cc: linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
openbmc@...ts.ozlabs.org
Subject: [PATCH v10 2/3] arm: dts: nuvoton: npcm: Add sgpio feature
From: Jim Liu <jim.t90615@...il.com>
Add the SGPIO controller to the NPCM7xx devicetree
Signed-off-by: Jim Liu <jim.t90615@...il.com>
---
Changes for v10:
- no changed
Changes for v9:
- no changed
---
.../dts/nuvoton/nuvoton-common-npcm7xx.dtsi | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
index 868454ae6bde..df91517a4842 100644
--- a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
@@ -372,6 +372,30 @@ &fanin12_pins &fanin13_pins
status = "disabled";
};
+ gpio8: gpio@...000 {
+ compatible = "nuvoton,npcm750-sgpio";
+ reg = <0x101000 0x200>;
+ clocks = <&clk NPCM7XX_CLK_APB3>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ nuvoton,input-ngpios = <64>;
+ nuvoton,output-ngpios = <64>;
+ status = "disabled";
+ };
+
+ gpio9: gpio@...000 {
+ compatible = "nuvoton,npcm750-sgpio";
+ reg = <0x102000 0x200>;
+ clocks = <&clk NPCM7XX_CLK_APB3>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ nuvoton,input-ngpios = <64>;
+ nuvoton,output-ngpios = <64>;
+ status = "disabled";
+ };
+
i2c0: i2c@...00 {
reg = <0x80000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
--
2.25.1
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