linux-kernel - Re: [PATCH 3/3] arm64: dts: qcom: sc8280xp-crd: Add PCIe CLKREQ# sleep state

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Message-ID: <240a1791-cb81-49e5-960b-9c960c0c15de@linaro.org>
Date: Sat, 30 Dec 2023 15:11:34 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Johan Hovold <johan@...nel.org>
Cc: Bjorn Andersson <andersson@...nel.org>, Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Johan Hovold <johan+linaro@...nel.org>,
 Marijn Suijten <marijn.suijten@...ainline.org>,
 linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org,
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
 Konrad Dybcio <konrad.dybcio@...ainline.org>
Subject: Re: [PATCH 3/3] arm64: dts: qcom: sc8280xp-crd: Add PCIe CLKREQ#
 sleep state

On 29.12.2023 13:55, Johan Hovold wrote:
> On Wed, Dec 27, 2023 at 11:28:28PM +0100, Konrad Dybcio wrote:
>> The CLKREQ pin should not be muxed to its active function when the RC
>> is asleep. 
> 
> You forgot to explain *why* you think this is needed.
You're right, I was in a flurry of patchsending..

> 
> Note that this is only appears to be done for one upstream Qualcomm SoC
> (msm8996) currently, and that, notably, there is no driver support for
> actually changing the pin state.
Please see my reply to Mani.

> 
>> Add the missing pin sleep states to resolve that.
> 
>> Fixes: d907fe5acbf1 ("arm64: dts: qcom: sc8280xp-crd: enable WiFi controller")
>> Fixes: 17e2ccaf65d1 ("arm64: dts: qcom: sc8280xp-crd: enable SDX55 modem")
>> Fixes: 6a1ec5eca73c ("arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD")
> 
> So not sure these Fixes tags are warranted either.
Agreed!

Konrad