[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZZPPflCNy6rULI2F@hovoldconsulting.com>
Date: Tue, 2 Jan 2024 09:55:26 +0100
From: Johan Hovold <johan@...nel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Konrad Dybcio <konrad.dybcio@...aro.org>,
Bjorn Andersson <andersson@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Johan Hovold <johan+linaro@...nel.org>,
Marijn Suijten <marijn.suijten@...ainline.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>
Subject: Re: [PATCH 2/3] arm64: dts: qcom: sc8280xp: Correct USB PHY power
domains
On Fri, Dec 29, 2023 at 10:40:08PM +0530, Manivannan Sadhasivam wrote:
> On Fri, Dec 29, 2023 at 02:01:06PM +0100, Johan Hovold wrote:
> > On Wed, Dec 27, 2023 at 11:28:27PM +0100, Konrad Dybcio wrote:
> > > The USB GDSCs are only related to the controllers.
> >
> > Are you sure?
>
> Yes, that's what I was told by UFS and PCIe teams and some of the internal
> documentation also confirms the same.
Ok, good. I'm not sure I did a corresponding test of powering on a USB
PHY without the corresponding USB GDSC enabled, so perhaps the issue I
noted only applies to PCIe.
Johan
Powered by blists - more mailing lists