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Message-ID: <CAA8EJpqg_BMXbcQEiH-YtgMtioYp0D9W-vGBvKpoGjfrQydYtw@mail.gmail.com>
Date: Thu, 4 Jan 2024 12:34:57 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Konrad Dybcio <konrad.dybcio@...aro.org>
Cc: Fenglin Wu <quic_fenglinw@...cinc.com>, quic_tdas@...cinc.com, 
	quic_aiquny@...cinc.com, kernel@...cinc.com, Andy Gross <agross@...nel.org>, 
	Bjorn Andersson <andersson@...nel.org>, Rob Herring <robh+dt@...nel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, 
	linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: ipq6018: add #power-domain-cells for
 gcc node

On Thu, 4 Jan 2024 at 12:16, Konrad Dybcio <konrad.dybcio@...aro.org> wrote:
>
> On 4.01.2024 11:13, Fenglin Wu wrote:
> >
> >
> > On 1/4/2024 5:53 PM, Dmitry Baryshkov wrote:
> >> On Thu, 4 Jan 2024 at 10:06, Fenglin Wu via B4 Relay
> >> <devnull+quic_fenglinw.quicinc.com@...nel.org> wrote:
> >>>
> >>> From: Fenglin Wu <quic_fenglinw@...cinc.com>
> >>>
> >>> Property '#power-domain-cells' is required as per defined in qcom,gcc.yaml
> >>> so add it for ipq6018 gcc device node to eliminate following warning in
> >>> dtbs_check:
> >>>
> >>> arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: gcc@...0000:
> >>>          '#power-domain-cells' is a required property
> >>> from schema $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq6018.yaml#
> >>
> >> But ipq6018 doesn't implement GDSC support. So for the sake of fixing
> >> the warning you are adding a bogus property.
> >>
> > I agree. However, there are also some gcc drivers not implementing GDSC support but the bindings are adding '#power-domain-cells' in the DT example, such as: qcom,gcc-apq8064.yaml, qcom,gcc-ipq4019.yaml, qcom,gcc-ipq6018.yaml, qcom,gcc-ipq8064.yaml, qcom,gcc-msm8660.yaml.
> >
> > Actually I thought that maybe we should do a clean up by removing '#power-domain-cells' out of the qcom,gcc.yaml binding and only adding it into individual qcom,gcc-xxx.yaml for the driver which has implemented GDSC support. I checked this with Taniya offline, but she prefers only fixing it in ipq6018.dtsi as it doesn't hurt anything by adding the property, and she expects the GDSC support should be existing in most of qcom,gcc drivers especially the newer Qcom chipsets.
>
> Before we start changing anything, we should assess whether these
> platforms actually have GDSCs within this clock controller block,
> even if they are (currently) not described in the clk driver.

APQ8064 / MSM8960 / MSM8x60  (and thus I assume IPQ8064) have an older
power rail control mechanism called footswitch / GFS_CTL. We do not
implement it (for now), but it might be worth implementing it as the
question has been raised.

-- 
With best wishes
Dmitry

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