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Message-ID: <59bbc646-b1ef-4ef0-9880-79856849a760@linux.intel.com>
Date: Thu, 4 Jan 2024 09:23:40 -0500
From: "Liang, Kan" <kan.liang@...ux.intel.com>
To: Ian Rogers <irogers@...gle.com>, Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>, Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>, Namhyung Kim <namhyung@...nel.org>,
Adrian Hunter <adrian.hunter@...el.com>, linux-perf-users@...r.kernel.org,
linux-kernel@...r.kernel.org, Edward Baker <edward.baker@...el.com>
Subject: Re: [PATCH v1 1/4] perf vendor events intel: Alderlake/rocketlake
metric fixes
On 2024-01-04 2:42 a.m., Ian Rogers wrote:
> Fix that the core PMU is being specified for 2 uncore events. Specify
> a PMU for the alderlake UNCORE_FREQ metric.
>
> Conversion script updated in:
> https://github.com/intel/perfmon/pull/126
>
> Reported-by: Arnaldo Carvalho de Melo <acme@...nel.org>
> Closes: https://lore.kernel.org/lkml/ZZWOdHXJJ_oecWwm@kernel.org/
> Signed-off-by: Ian Rogers <irogers@...gle.com>
Thanks Ian. For the series,
Reviewed-by: Kan Liang <kan.liang@...ux.intel.com>
Thanks,
Kan
> ---
> .../arch/x86/alderlake/adl-metrics.json | 15 ++++++++-------
> .../arch/x86/rocketlake/rkl-metrics.json | 2 +-
> 2 files changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json b/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json
> index 3388b58b8f1a..35124a4ddcb2 100644
> --- a/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json
> +++ b/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json
> @@ -69,12 +69,6 @@
> "MetricName": "C9_Pkg_Residency",
> "ScaleUnit": "100%"
> },
> - {
> - "BriefDescription": "Uncore frequency per die [GHZ]",
> - "MetricExpr": "tma_info_system_socket_clks / #num_dies / duration_time / 1e9",
> - "MetricGroup": "SoC",
> - "MetricName": "UNCORE_FREQ"
> - },
> {
> "BriefDescription": "Percentage of cycles spent in System Management Interrupts.",
> "MetricExpr": "((msr@...rf@ - cycles) / msr@...rf@ if msr@smi@ > 0 else 0)",
> @@ -809,6 +803,13 @@
> "ScaleUnit": "100%",
> "Unit": "cpu_atom"
> },
> + {
> + "BriefDescription": "Uncore frequency per die [GHZ]",
> + "MetricExpr": "tma_info_system_socket_clks / #num_dies / duration_time / 1e9",
> + "MetricGroup": "SoC",
> + "MetricName": "UNCORE_FREQ",
> + "Unit": "cpu_core"
> + },
> {
> "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",
> "MetricExpr": "(cpu_core@...S_DISPATCHED.PORT_0@ + cpu_core@...S_DISPATCHED.PORT_1@ + cpu_core@...S_DISPATCHED.PORT_5_11@ + cpu_core@...S_DISPATCHED.PORT_6@) / (5 * tma_info_core_core_clks)",
> @@ -1838,7 +1839,7 @@
> },
> {
> "BriefDescription": "Average number of parallel data read requests to external memory",
> - "MetricExpr": "UNC_ARB_DAT_OCCUPANCY.RD / cpu_core@..._ARB_DAT_OCCUPANCY.RD\\,cmask\\=1@",
> + "MetricExpr": "UNC_ARB_DAT_OCCUPANCY.RD / UNC_ARB_DAT_OCCUPANCY.RD@...sk\\=1@",
> "MetricGroup": "Mem;MemoryBW;SoC",
> "MetricName": "tma_info_system_mem_parallel_reads",
> "PublicDescription": "Average number of parallel data read requests to external memory. Accounts for demand loads and L1/L2 prefetches",
> diff --git a/tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json b/tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json
> index 0c880e415669..27433fc15ede 100644
> --- a/tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json
> +++ b/tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json
> @@ -985,7 +985,7 @@
> },
> {
> "BriefDescription": "Average number of parallel data read requests to external memory",
> - "MetricExpr": "UNC_ARB_DAT_OCCUPANCY.RD / cpu@..._ARB_DAT_OCCUPANCY.RD\\,cmask\\=1@",
> + "MetricExpr": "UNC_ARB_DAT_OCCUPANCY.RD / UNC_ARB_DAT_OCCUPANCY.RD@...sk\\=1@",
> "MetricGroup": "Mem;MemoryBW;SoC",
> "MetricName": "tma_info_system_mem_parallel_reads",
> "PublicDescription": "Average number of parallel data read requests to external memory. Accounts for demand loads and L1/L2 prefetches"
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