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Message-ID: <e35a446c-ab18-452b-9d44-b73ce3ca3856@amd.com>
Date: Fri, 5 Jan 2024 15:44:48 +0100
From: Michal Simek <michal.simek@....com>
To: Palmer Dabbelt <palmer@...belt.com>, Conor Dooley <conor@...nel.org>
Cc: linux-kernel@...r.kernel.org, monstr@...str.eu, michal.simek@...inx.com,
git@...inx.com, aou@...s.berkeley.edu, krzysztof.kozlowski+dt@...aro.org,
Paul Walmsley <paul.walmsley@...ive.com>, robh+dt@...nel.org,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH] dt-bindings: riscv: cpus: Add AMD MicroBlaze V compatible
On 12/20/23 16:15, Palmer Dabbelt wrote:
> On Thu, 09 Nov 2023 09:15:09 PST (-0800), Conor Dooley wrote:
>> On Mon, Nov 06, 2023 at 12:37:47PM +0100, Michal Simek wrote:
>>> MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP.
>>> It is hardware compatible with classic MicroBlaze processor.
>>>
>>> Signed-off-by: Michal Simek <michal.simek@....com>
>>
>> Acked-by: Conor Dooley <conor.dooley@...rochip.com>
>> I thought I had already done so, but must have forgot to actually send
>> the email.
>
> Conor asked me to pick it up, it's over staged for testing. Pretty much
> no chance it fails anything, so should show up on for-next soon.
Palmer: Any update on this?
Thanks,
Michal
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