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Date: Mon, 8 Jan 2024 16:39:12 +0100
From: Michal Simek <michal.simek@....com>
To: <linux-kernel@...r.kernel.org>, <monstr@...str.eu>,
<michal.simek@...inx.com>, <git@...inx.com>
CC: Conor Dooley <conor+dt@...nel.org>, Krzysztof Kozlowski
<krzysztof.kozlowski+dt@...aro.org>, Rob Herring <robh+dt@...nel.org>, "open
list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, "moderated list:ARM/ZYNQ ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>
Subject: [PATCH 01/14] arm64: xilinx: Move address/size-cells to proper locations
Move cells to board dtsi files from generic zynqmp.dtsi. Changes are
related to qspi, spi, nand, i2c and ethernet
address cells
make -j8 W=1 dtbs
Signed-off-by: Michal Simek <michal.simek@....com>
---
arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 6 ++++++
arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts | 2 ++
arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts | 2 ++
.../boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts | 4 ++++
.../boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts | 8 ++++++++
.../boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts | 2 ++
.../boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts | 2 ++
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts | 2 ++
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 6 ++++++
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts | 4 ++++
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts | 4 ++++
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts | 6 ++++++
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 6 ++++++
arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts | 2 ++
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 14 --------------
15 files changed, 56 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
index 51622896b1b1..5442edede687 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
@@ -129,6 +129,8 @@ mux {
};
&qspi { /* MIO 0-5 - U143 */
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
spi_flash: flash@0 { /* MT25QU512A */
compatible = "jedec,spi-nor"; /* 64MB */
@@ -240,6 +242,8 @@ &sdhci0 { /* MIO13-23 - 16GB emmc MTFC16GAPALBH-IT - U133A */
};
&spi1 { /* MIO6, 9-11 */
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
label = "TPM";
num-cs = <1>;
@@ -251,6 +255,8 @@ tpm@0 { /* slm9670 - U144 */
};
&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
bootph-all;
clock-frequency = <400000>;
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
index 04079d1704f1..cbaf6303a17c 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
@@ -38,6 +38,8 @@ &dcc {
};
&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
index 3dec57cf18be..18187b6df3d8 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
@@ -39,6 +39,8 @@ &dcc {
};
&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
index 73491626e01e..986efae8847a 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
@@ -118,6 +118,8 @@ &gpu {
};
&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
@@ -353,6 +355,8 @@ &psgtr {
};
&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor"; /* Micron MT25QU512ABB8ESF */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
index f767708fb50d..7599a12b64a5 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
@@ -109,6 +109,8 @@ &gpio {
};
&i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
@@ -132,6 +134,8 @@ rtc@68 {
};
&nand0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand0_default>;
@@ -444,6 +448,8 @@ &rtc {
};
&spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
num-cs = <1>;
pinctrl-names = "default";
@@ -464,6 +470,8 @@ partition@0 {
};
&spi1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
num-cs = <1>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts
index f553b317e6b2..17e8a7c3701a 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts
@@ -103,6 +103,8 @@ &gpio {
/* just eeprom here */
&i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
index 6ec1d9813973..5ad533cf86ea 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
@@ -171,6 +171,8 @@ &i2c1 {
};
&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
index 52f998c22538..b4456e5b5058 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
@@ -176,6 +176,8 @@ &gpu {
};
&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1_default>;
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index 84952c14f021..55a8d3e9d44f 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -228,6 +228,8 @@ &gpu {
};
&i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
@@ -492,6 +494,8 @@ max20751@73 { /* u96 */
};
&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
@@ -951,6 +955,8 @@ &psgtr {
};
&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor"; /* 16MB + 16MB */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
index 5084ddcee00f..59a919368094 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
@@ -135,6 +135,8 @@ &gpu {
};
&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
@@ -438,6 +440,8 @@ &psgtr {
};
&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor"; /* n25q512a 128MiB */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
index b273bd1d920a..4fe60f22c852 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
@@ -140,6 +140,8 @@ &gpu {
};
&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
@@ -450,6 +452,8 @@ &psgtr {
};
&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor"; /* n25q512a 128MiB */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
index 50c384aa253e..afc5571bf72b 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
@@ -240,6 +240,8 @@ &gpu {
};
&i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
@@ -503,6 +505,8 @@ max20751@73 { /* u96 */
};
&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
@@ -958,6 +962,8 @@ &psgtr {
};
&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor"; /* 16MB + 16MB */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
index 617cb0405a7d..e3e0377d543e 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
@@ -200,6 +200,8 @@ &gpu {
};
&i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
@@ -380,6 +382,8 @@ i2c@3 {
};
&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
@@ -788,6 +792,8 @@ &psgtr {
};
&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor"; /* 16MB + 16MB */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
index c406017b0348..7386ffb7daeb 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
@@ -43,6 +43,8 @@ &gpio {
};
&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor";
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index ea1a9ba16246..a9a23cf50196 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -571,8 +571,6 @@ nand0: nand-controller@...00000 {
clock-names = "controller", "bus";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
iommus = <&smmu 0x872>;
power-domains = <&zynqmp_firmware PD_NAND>;
};
@@ -653,8 +651,6 @@ i2c0: i2c@...20000 {
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>;
reg = <0x0 0xff020000 0x0 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
power-domains = <&zynqmp_firmware PD_I2C_0>;
};
@@ -665,8 +661,6 @@ i2c1: i2c@...30000 {
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>;
reg = <0x0 0xff030000 0x0 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
power-domains = <&zynqmp_firmware PD_I2C_1>;
};
@@ -718,8 +712,6 @@ qspi: spi@...f0000 {
num-cs = <1>;
reg = <0x0 0xff0f0000 0x0 0x1000>,
<0x0 0xc0000000 0x0 0x8000000>;
- #address-cells = <1>;
- #size-cells = <0>;
iommus = <&smmu 0x873>;
power-domains = <&zynqmp_firmware PD_QSPI>;
};
@@ -819,8 +811,6 @@ spi0: spi@...40000 {
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff040000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
- #address-cells = <1>;
- #size-cells = <0>;
power-domains = <&zynqmp_firmware PD_SPI_0>;
};
@@ -831,8 +821,6 @@ spi1: spi@...50000 {
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff050000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
- #address-cells = <1>;
- #size-cells = <0>;
power-domains = <&zynqmp_firmware PD_SPI_1>;
};
@@ -1005,8 +993,6 @@ ams_pl: ams-pl@400 {
compatible = "xlnx,zynqmp-ams-pl";
status = "disabled";
reg = <0x400 0x400>;
- #address-cells = <1>;
- #size-cells = <0>;
};
};
--
2.36.1
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