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Date: Wed, 10 Jan 2024 22:06:15 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Shengyang Chen <shengyang.chen@...rfivetech.com>,
 devicetree@...r.kernel.org, dri-devel@...ts.freedesktop.org
Cc: andrzej.hajda@...el.com, neil.armstrong@...aro.org, rfoss@...nel.org,
 Laurent.pinchart@...asonboard.com, jonas@...boo.se,
 jernej.skrabec@...il.com, maarten.lankhorst@...ux.intel.com,
 mripard@...nel.org, tzimmermann@...e.de, airlied@...il.com, daniel@...ll.ch,
 robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
 p.zabel@...gutronix.de, tomi.valkeinen@...asonboard.com, r-ravikumar@...com,
 aford173@...il.com, rdunlap@...radead.org, u.kleine-koenig@...gutronix.de,
 bbrezillon@...nel.org, changhuang.liang@...rfivetech.com,
 keith.zhao@...rfivetech.com, jack.zhu@...rfivetech.com,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/2] dt-bindings: display: bridge: cdns: Add properties
 to support StarFive JH7110 SoC

On 09/01/2024 08:25, Shengyang Chen wrote:
> From: Keith Zhao <keith.zhao@...rfivetech.com>
> 
> Add properties in CDNS DSI yaml file to match with
> CDNS DSI module in StarFive JH7110 SoC.

Please wrap commit message according to Linux coding style / submission
process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597

Subject: Make it concise, like: "Add StarFive JH7110 SoC display bridge
or something".

> 
> Signed-off-by: Keith Zhao <keith.zhao@...rfivetech.com>
> ---
>  .../bindings/display/bridge/cdns,dsi.yaml     | 44 ++++++++++++++++++-
>  1 file changed, 42 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> index 23060324d16e..da091e105794 100644
> --- a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> @@ -16,6 +16,7 @@ properties:
>    compatible:
>      enum:
>        - cdns,dsi
> +      - starfve,jh7110-dsi
>        - ti,j721e-dsi
>  
>    reg:
> @@ -27,14 +28,20 @@ properties:
>            Register block for wrapper settings registers in case of TI J7 SoCs.
>  
>    clocks:
> +    minItems: 2
>      items:
>        - description: PSM clock, used by the IP
>        - description: sys clock, used by the IP
> +      - description: apb clock, used by the IP
> +      - description: txesc clock, used by the IP
>  
>    clock-names:
> +    minItems: 2
>      items:
>        - const: dsi_p_clk
>        - const: dsi_sys_clk
> +      - const: apb
> +      - const: txesc
>  
>    phys:
>      maxItems: 1
> @@ -46,10 +53,21 @@ properties:
>      maxItems: 1
>  
>    resets:
> -    maxItems: 1
> +    minItems: 1
> +    items:
> +      - description: dsi sys reset line
> +      - description: dsi dpi reset line
> +      - description: dsi apb reset line
> +      - description: dsi txesc reset line
> +      - description: dsi txbytehs reset line
>  
>    reset-names:
> -    const: dsi_p_rst
> +    items:
> +      - const: dsi_p_rst
> +      - const: dpi
> +      - const: apb
> +      - const: txesc
> +      - const: txbytehs
>  
>    ports:
>      $ref: /schemas/graph.yaml#/properties/ports
> @@ -90,6 +108,28 @@ allOf:
>          reg:
>            maxItems: 1
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: starfive,jh7110-dsi
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 4
> +          maxItems: 4
> +        resets:
> +          minItems: 5
> +          maxItems: 5

Missing constraints for xxx-names.

> +      required:
> +        - reset-names
> +    else:
> +      properties:
> +        clocks:
> +          maxItems: 2
> +        resets:
> +          maxItems: 1

Same problem.

Best regards,
Krzysztof


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