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Message-ID: <10409718.nUPlyArG6x@steina-w>
Date: Wed, 10 Jan 2024 12:48:13 +0100
From: Alexander Stein <alexander.stein@...tq-group.com>
To: dri-devel@...ts.freedesktop.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor.dooley@...rochip.com>, Laurent Pinchart <Laurent.pinchart@...asonboard.com>, Andrzej Hajda <andrzej.hajda@...el.com>, Fabio Estevam <festevam@...il.com>, Robert Foss <rfoss@...nel.org>, Jernej Skrabec <jernej.skrabec@...il.com>, NXP Linux Team <linux-imx@....com>, devicetree@...r.kernel.org, Conor Dooley <conor+dt@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, Jonas Karlman <jonas@...boo.se>, Liu Ying <victor.liu@....com>, Sascha Hauer <s.hauer@...gutronix.de>, Maxime Ripard <mripard@...nel.org>, Rob Herring <robh+dt@...nel.org>, Adam Ford <aford173@...il.com>, Pengutronix Kernel Team <kernel@...gutronix.de>, linux-arm-kernel@...ts.infradead.org, Neil Armstrong <neil.armstrong@...aro.org>, linux-kernel@...r.kernel.org, Shawn Guo <shawnguo@...nel.org>, Adam Ford <aford173@...il.com>
Subject: Re: [PATCH V7 1/2] dt-bindings: display: imx: add binding for i.MX8MP HDMI PVI

Hi Adam,

thanks for pushing this forward.

Am Samstag, 6. Januar 2024, 22:51:44 CET schrieb Adam Ford:
> From: Lucas Stach <l.stach@...gutronix.de>
> 
> Add binding for the i.MX8MP HDMI parallel video interface block.
> 
> Signed-off-by: Lucas Stach <l.stach@...gutronix.de>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
> Signed-off-by: Adam Ford <aford173@...il.com>
> ---
> V7:  No Change
> 
> V6:  Add s-o-b message for myself (Adam)
> 
> V5:  I tried to help move this along, so I took Lucas' patch and
>      attempted to apply fixes based on feedback.  I don't have
>      all the history, so apologies for that.
>      Removed the pipe character from the Description.
>      Increased the register size from 0x40 to 0x44.
> diff --git
> a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
> b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
> new file mode 100644
> index 000000000000..3377f152f319
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8MP HDMI Parallel Video Interface
> +
> +maintainers:
> +  - Lucas Stach <l.stach@...gutronix.de>
> +
> +description:
> +  The HDMI parallel video interface is a timing and sync generator block in
> the +  i.MX8MP SoC, that sits between the video source and the HDMI TX
> controller. +
> +properties:
> +  compatible:
> +    const: fsl,imx8mp-hdmi-pvi
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  ports:
> +    $ref: /schemas/graph.yaml#/properties/ports
> +
> +    properties:
> +      port@0:
> +        $ref: /schemas/graph.yaml#/properties/port
> +        description: Input from the LCDIF controller.
> +
> +      port@1:
> +        $ref: /schemas/graph.yaml#/properties/port
> +        description: Output to the HDMI TX controller.
> +
> +    required:
> +      - port@0
> +      - port@1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - power-domains
> +  - ports
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    #include <dt-bindings/power/imx8mp-power.h>
> +
> +    display-bridge@...c4000 {
> +        compatible = "fsl,imx8mp-hdmi-pvi";
> +        reg = <0x32fc4000 0x44>;

Shall interrupt-parent = <&irqsteer_hdmi>; be added here as well?

Best regards,
Alexander

> +        interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
> +        power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>;
> +
> +        ports {
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +
> +            port@0 {
> +                reg = <0>;
> +                pvi_from_lcdif3: endpoint {
> +                    remote-endpoint = <&lcdif3_to_pvi>;
> +                };
> +            };
> +
> +            port@1 {
> +                reg = <1>;
> +                pvi_to_hdmi_tx: endpoint {
> +                    remote-endpoint = <&hdmi_tx_from_pvi>;
> +                };
> +            };
> +        };
> +    };


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