linux-kernel - Re: Proposal for QCOM PCIe switch power and configuration driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <036823ce-9815-4884-aa3a-9c3831cea9bb@linaro.org>
Date: Thu, 11 Jan 2024 18:50:35 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Krishna Chaitanya Chundru <quic_krichai@...cinc.com>,
 Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
 Veerabhadrarao Badiganti <quic_vbadigan@...cinc.com>,
 quic_skananth@...cinc.com, bartosz.golaszewski@...aro.org,
 open list <linux-kernel@...r.kernel.org>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@...r.kernel.org>,
 "open list:PCIE ENDPOINT DRIVER FOR QUALCOMM" <linux-arm-msm@...r.kernel.org>
Subject: Re: Proposal for QCOM PCIe switch power and configuration driver

On 11/01/2024 18:38, Krishna Chaitanya Chundru wrote:
> Hi DT maintainers,
> 
> We are trying to upstream the QCOM PCIe switch which has I2C interface
> to configure the switch.
> 
> In generic a PCIe switch is a device that allows expansion of PCI
> Express hierarchy, which allows more devices(PCIe endpoints) to be
> connected to a single PCIe port.
> 
> We need to configure the QCOM switch like L0s, L1ss entry times, Tx
> amplitudes etc.. through I2C interface before PCIe link is established
> as these settings can affect link stability if we don't configure them.
> 
> Once PCIe switch is configured, PCIe link between the PCIe switch and
> PCIe port connected should be established by the QCOM PCIe controller
> driver to enumerate the PCIe endpoints connected to the PCIe switch.
> 
> We had a QCOM switch driver which powers on the switch and do the I2C
> configurations.
> 
> This is how the flow goes.
> -->Power on the switch
>      -->Do Switch configuration (over i2c) with qcom switch driver
>          -->PCIe link training and enumeration.

And where is the PCI controller in this? Why isn't this represented like
I2C or GPIO expander? You need to describe what exactly the switch is doing.

Also, how about using existing solutions? Aren't there any? I am not
going to look for them for you...

Anyway, you should ask (means Cc) reset controller maintainers if they
are happy for such usage of reset framework for something not being a
reset. For similar reasons you should Cc PCI maintainers. If you ask me,
then no, PCI switch does not look like reset line so, you should not use
reset lines.

Best regards,
Krzysztof