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Message-ID: <cf6ec52e-61ad-f76d-02fd-831c63e35d40@quicinc.com>
Date: Tue, 16 Jan 2024 10:36:23 +0530
From: Krishna Chaitanya Chundru <quic_krichai@...cinc.com>
To: Bjorn Helgaas <helgaas@...nel.org>
CC: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio
<konrad.dybcio@...aro.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
"Lorenzo
Pieralisi" <lpieralisi@...nel.org>,
Krzysztof WilczyĆski
<kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski
<krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Johan Hovold <johan+linaro@...nel.org>,
Brian Masney <bmasney@...hat.com>, Georgi Djakov <djakov@...nel.org>,
<linux-arm-msm@...r.kernel.org>, <vireshk@...nel.org>,
<quic_vbadigan@...cinc.com>, <quic_skananth@...cinc.com>,
<quic_nitegupt@...cinc.com>, <linux-pci@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<stable@...r.kernel.org>
Subject: Re: [PATCH v6 3/6] PCI: qcom: Add missing icc bandwidth vote for cpu
to PCIe path
On 1/12/2024 10:17 PM, Bjorn Helgaas wrote:
> Capitalize "ICC" and "CPU" to make the subject easier to read.
> "Missing" might be superfluous in the subject? It would be nice to
> have the ICC expansion once in the commit log as a hook for newbies
> like me :)
>
Sure I will change a suggested in next patch series.
> On Fri, Jan 12, 2024 at 07:52:02PM +0530, Krishna chaitanya chundru wrote:
>> CPU-PCIe path consits for registers PCIe BAR space, config space.
>> As there is less access on this path compared to pcie to mem path
>> add minimum vote i.e GEN1x1 bandwidth always.
>
> "GEN1x1" is unnecessarily ambiguous, and the spec recommends avoiding
> it (PCIe r6.0, sec 1.2). Use the actual bandwidth numbers instead.
>
> "PCIe" to match above. Also below in comments and messages.
>
ACK.
>> In suspend remove the cpu vote after register space access is done.
>
> "CPU" to match above.
>
ACK
>> Fixes: c4860af88d0c ("PCI: qcom: Add basic interconnect support")
>> cc: stable@...r.kernel.org
>> Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
>> ---
>> drivers/pci/controller/dwc/pcie-qcom.c | 31 +++++++++++++++++++++++++++++--
>> 1 file changed, 29 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
>> index 11c80555d975..035953f0b6d8 100644
>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>> @@ -240,6 +240,7 @@ struct qcom_pcie {
>> struct phy *phy;
>> struct gpio_desc *reset;
>> struct icc_path *icc_mem;
>> + struct icc_path *icc_cpu;
>> const struct qcom_pcie_cfg *cfg;
>> struct dentry *debugfs;
>> bool suspended;
>> @@ -1372,6 +1373,9 @@ static int qcom_pcie_icc_init(struct qcom_pcie *pcie)
>> if (IS_ERR(pcie->icc_mem))
>> return PTR_ERR(pcie->icc_mem);
>>
>> + pcie->icc_cpu = devm_of_icc_get(pci->dev, "cpu-pcie");
>> + if (IS_ERR(pcie->icc_cpu))
>> + return PTR_ERR(pcie->icc_cpu);
>> /*
>> * Some Qualcomm platforms require interconnect bandwidth constraints
>> * to be set before enabling interconnect clocks.
>> @@ -1381,7 +1385,18 @@ static int qcom_pcie_icc_init(struct qcom_pcie *pcie)
>> */
>> ret = icc_set_bw(pcie->icc_mem, 0, QCOM_PCIE_LINK_SPEED_TO_BW(1));
>> if (ret) {
>> - dev_err(pci->dev, "failed to set interconnect bandwidth: %d\n",
>> + dev_err(pci->dev, "failed to set interconnect bandwidth for pcie-mem: %d\n",
>> + ret);
>> + return ret;
>> + }
>> +
>> + /*
>> + * The config space, BAR space and registers goes through cpu-pcie path.
>> + * Set peak bandwidth to single-lane Gen1 for this path all the time.
>
> Numbers instead of "Gen1".
>
ACK
-Krishna Chaitanya.
>> + */
>> + ret = icc_set_bw(pcie->icc_cpu, 0, QCOM_PCIE_LINK_SPEED_TO_BW(1));
>> + if (ret) {
>> + dev_err(pci->dev, "failed to set interconnect bandwidth for cpu-pcie: %d\n",
>> ret);
>> return ret;
>> }
>> @@ -1573,7 +1588,7 @@ static int qcom_pcie_suspend_noirq(struct device *dev)
>> */
>> ret = icc_set_bw(pcie->icc_mem, 0, kBps_to_icc(1));
>> if (ret) {
>> - dev_err(dev, "Failed to set interconnect bandwidth: %d\n", ret);
>> + dev_err(dev, "Failed to set interconnect bandwidth for pcie-mem: %d\n", ret);
>> return ret;
>> }
>>
>> @@ -1597,6 +1612,12 @@ static int qcom_pcie_suspend_noirq(struct device *dev)
>> pcie->suspended = true;
>> }
>>
>> + /* Remove cpu path vote after all the register access is done */
>> + ret = icc_set_bw(pcie->icc_cpu, 0, 0);
>> + if (ret) {
>> + dev_err(dev, "failed to set interconnect bandwidth for cpu-pcie: %d\n", ret);
>> + return ret;
>> + }
>> return 0;
>> }
>>
>> @@ -1605,6 +1626,12 @@ static int qcom_pcie_resume_noirq(struct device *dev)
>> struct qcom_pcie *pcie = dev_get_drvdata(dev);
>> int ret;
>>
>> + ret = icc_set_bw(pcie->icc_cpu, 0, QCOM_PCIE_LINK_SPEED_TO_BW(1));
>> + if (ret) {
>> + dev_err(dev, "failed to set interconnect bandwidth for cpu-pcie: %d\n", ret);
>> + return ret;
>> + }
>> +
>> if (pcie->suspended) {
>> ret = qcom_pcie_host_init(&pcie->pci->pp);
>> if (ret)
>>
>> --
>> 2.42.0
>>
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