lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Wed, 17 Jan 2024 10:31:34 -0600
From: Sam Protsenko <semen.protsenko@...aro.org>
To: Tudor Ambarus <tudor.ambarus@...aro.org>
Cc: krzysztof.kozlowski@...aro.org, alim.akhtar@...sung.com, 
	gregkh@...uxfoundation.org, jirislaby@...nel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-serial@...r.kernel.org, 
	andre.draszik@...aro.org, peter.griffin@...aro.org, kernel-team@...roid.com, 
	willmcvicker@...gle.com
Subject: Re: [PATCH 16/18] tty: serial: samsung: shrink the clock selection to
 8 clocks

On Wed, Jan 17, 2024 at 10:26 AM Tudor Ambarus <tudor.ambarus@...aro.org> wrote:
>
>
>
> On 1/16/24 19:09, Sam Protsenko wrote:
> > On Wed, Jan 10, 2024 at 4:25 AM Tudor Ambarus <tudor.ambarus@...aro.org> wrote:
> >>
> >> <linux/serial_s3c.h> provides a clock selection pool of maximum 4 clocks.
> >
> > Then maybe it makes sense to turn those two field into 4-bit bit
> > fields? More importantly, what particular problem does this patch
> > solve, is this optimization really needed, and why? I'm not saying
> > it's not needed, just that commit message might've been more verbose
> > about this.
> >
>
> I guess I could have been more verbose in the phrase from below and said
> that for arm64 ``struct s3c24xx_uart_info`` spans through 2 cachelines
> and contains 2 holes, and with a bit of love it can fit a single
> cacheline with no holes. The end goal is to reduce the memory footprint
> of that struct.
>

Oh yeah, I actually like the cachelines part. Please add that bit to
the commit message if you don't mind.

> I chose u8 and allowed a max of 8 clocks simple because it's large
> enough to allow more clocks than are supported by the driver now, and
> not too big to cause spanning of the structure through 2 cachelines.
>

Gotcha. Maybe also add that reasoning to the commit message. Just a
thought. With above comments addressed, feel free to add:

Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>

>
> >> Update the driver to consider a pool selection of maximum 8 clocks. The
> >> final scope is to reduce the memory footprint of
> >> ``struct s3c24xx_uart_info``.
> >>
> >> Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
> >> ---
> >>  drivers/tty/serial/samsung_tty.c | 22 +++++++++++-----------
> >>  1 file changed, 11 insertions(+), 11 deletions(-)
> >>
> >> diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
> >> index 436739cf9225..5df2bcebf9fb 100644
> >> --- a/drivers/tty/serial/samsung_tty.c
> >> +++ b/drivers/tty/serial/samsung_tty.c
> >> @@ -81,11 +81,11 @@ struct s3c24xx_uart_info {
> >>         unsigned long           tx_fifomask;
> >>         unsigned long           tx_fifoshift;
> >>         unsigned long           tx_fifofull;
> >> -       unsigned int            def_clk_sel;
> >> -       unsigned long           num_clks;
> >>         unsigned long           clksel_mask;
> >>         unsigned long           clksel_shift;
> >>         unsigned long           ucon_mask;
> >> +       u8                      def_clk_sel;
> >> +       u8                      num_clks;
> >>         u8                      iotype;
> >>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ