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Date: Wed, 17 Jan 2024 14:13:19 -0500
From: Nicolas Dufresne <nicolas@...fresne.ca>
To: Jianfeng Liu <liujianfeng1994@...il.com>, robh+dt@...nel.org, 
	krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org, heiko@...ech.de, 
	ezequiel@...guardiasur.com.ar, p.zabel@...gutronix.de, mchehab@...nel.org
Cc: sfr@...b.auug.org.au, devicetree@...r.kernel.org, 
 linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org, 
 linux-kernel@...r.kernel.org, linux-media@...r.kernel.org,
 sigmaris@...il.com,  knaerzche@...il.com
Subject: Re: [PATCH v3 1/2] arm64: dts: rockchip: Add Hantro G1 VPU support
 for RK3588

Hi Jianfeng,

Le dimanche 31 décembre 2023 à 23:11 +0800, Jianfeng Liu a écrit :
> This patch enables Hantro G1 video decoder in RK3588's
> devicetree.
> 
> Tested with FFmpeg v4l2_request code taken from [1]
> with MPEG2, H.264 and VP8 samples.

In general, we ask submitters to share a fluster [0] score (this is just to
demonstrate that the integration has been well validated). LibreELEC community
have patch to enable this ffmpeg fork. I don't expect any surprise here, and you
can just reply to my email here.

Alternatively, this test tool is shipped in latest Debian, and with the
appropriate GStreamer packages you'll be able to run the VP8 and H.264 tests.

Nicolas

[0] https://github.com/fluendo/fluster

> 
> [1] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch
> 
> Signed-off-by: Jianfeng Liu <liujianfeng1994@...il.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> index 5fb0baf8a..ab2792162 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> @@ -640,6 +640,26 @@ i2c0: i2c@...80000 {
>  		status = "disabled";
>  	};
>  
> +	vpu: video-codec@...50000 {
> +		compatible = "rockchip,rk3588-vpu", "rockchip,rk3568-vpu";
> +		reg = <0x0 0xfdb50000 0x0 0x800>;
> +		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
> +		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
> +		clock-names = "aclk", "hclk";
> +		iommus = <&vdpu_mmu>;
> +		power-domains = <&power RK3588_PD_VDPU>;
> +	};
> +
> +	vdpu_mmu: iommu@...50800 {
> +		compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
> +		reg = <0x0 0xfdb50800 0x0 0x40>;
> +		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
> +		clock-names = "aclk", "iface";
> +		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
> +		power-domains = <&power RK3588_PD_VDPU>;
> +		#iommu-cells = <0>;
> +	};
> +
>  	vop: vop@...90000 {
>  		compatible = "rockchip,rk3588-vop";
>  		reg = <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>;


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