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Message-ID: <Za7O7mfuQH7GxWVQ@x1-carbon>
Date: Mon, 22 Jan 2024 21:24:14 +0100
From: Niklas Cassel <cassel@...nel.org>
To: Dan Carpenter <dan.carpenter@...aro.org>
Cc: Jingoo Han <jingoohan1@...il.com>,
Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
kernel-janitors@...r.kernel.org
Subject: Re: [PATCH v3 2/2] PCI: dwc: Cleanup in dw_pcie_ep_raise_msi_irq()
On Mon, Jan 22, 2024 at 06:21:00PM +0300, Dan Carpenter wrote:
> I recently changed the code in dw_pcie_ep_raise_msix_irq() to use
> ALIGN_DOWN(). The code in dw_pcie_ep_raise_msi_irq() is similar so
> update it to match as well. (No effect on runtime, just a cleanup).
>
> Signed-off-by: Dan Carpenter <dan.carpenter@...aro.org>
> ---
> v2: Add this patch
> v3: Use ALIGN_DOWN() as a style improvement
>
> drivers/pci/controller/dwc/pcie-designware-ep.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 51679c6702cf..1c8d2e938851 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -483,8 +483,8 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no,
> msg_data = dw_pcie_ep_readw_dbi(ep, func_no, reg);
> }
> aligned_offset = msg_addr_lower & (epc->mem->window.page_size - 1);
> - msg_addr = ((u64)msg_addr_upper) << 32 |
> - (msg_addr_lower & ~aligned_offset);
> + msg_addr = ((u64)msg_addr_upper) << 32 | msg_addr_lower;
> + msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size);
> ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr,
> epc->mem->window.page_size);
> if (ret)
> --
> 2.43.0
>
Reviewed-by: Niklas Cassel <cassel@...nel.org>
Although, if I'm being super nitpicky
(sorry... and feel free to ignore),
I think this is slightly cleaner:
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -482,9 +482,10 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no,
reg = ep_func->msi_cap + PCI_MSI_DATA_32;
msg_data = dw_pcie_ep_readw_dbi(ep, func_no, reg);
}
- aligned_offset = msg_addr_lower & (epc->mem->window.page_size - 1);
- msg_addr = ((u64)msg_addr_upper) << 32 |
- (msg_addr_lower & ~aligned_offset);
+ msg_addr = ((u64)msg_addr_upper) << 32 | msg_addr_lower;
+
+ aligned_offset = msg_addr & (epc->mem->window.page_size - 1);
+ msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size);
ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr,
epc->mem->window.page_size);
if (ret)
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