linux-kernel - Re: [PATCH v2] mtd: spinand: add support for ESMT F50x1G41LB

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Wed, 24 Jan 2024 18:08:48 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Ezra Buehler <ezra@...yb.ch>
Cc: Chuanhong Guo <gch981213@...il.com>, linux-mtd@...ts.infradead.org,
 Richard Weinberger <richard@....at>, Vignesh Raghavendra <vigneshr@...com>,
 Patrice Chotard <patrice.chotard@...s.st.com>, Boris Brezillon
 <boris.brezillon@...labora.com>, Christophe Kerello
 <christophe.kerello@...s.st.com>, Mark Brown <broonie@...nel.org>, Daniel
 Palmer <daniel@...f.com>, open list <linux-kernel@...r.kernel.org>,
 quic_sridsn@...cinc.com, quic_mdalam@...cinc.com
Subject: Re: [PATCH v2] mtd: spinand: add support for ESMT F50x1G41LB

Hi Ezra,

ezra@...yb.ch wrote on Tue, 23 Jan 2024 19:54:06 +0200:

> Hi Chuanhong Guo,
> 
> On Wed, 13 Apr 2022 22:50:43 +0800 Chuanhong Guo <gch981213@...il.com> wrote:
> > Their device ID aren't conflicting yet, so nothing will happen
> > at the moment.  
> 
> Since commit aa08bf187f32 ("mtd: spinand: esmt: add support for
> F50D2G41KA") we have a conflict with the GigaDevice GD5F1GQ5UExxG
> (manufacturer ID 0xC8, device ID 0x51), preventing our board from
> booting.
> 
> > There is a solution for future conflict: Recent SPI-NAND chips
> > contain a parameter page which has the exact chip vendor
> > and model. We can do one more detection with the parameter
> > page content.
> > Winbond W25N01KV is a 2k+96 SPI-NAND with 4-bit ECC.
> > It uses the exact same chip id as the current W25N01GV
> > (2k+64 1-bit ECC). We need to support detection using
> > parameter page for this crazy decision by Winbond anyway.
> > I'll try to code something for this with my free time.
> >
> > My current idea is: We first do a detection based on chip id.
> > If that failed, try to read the parameter page. If we got a
> > valid one, match the chip vendor and model string.  
> 
> According to the datasheets, the ESMT chips actually have a 5 byte ID,
> the last 3 bytes being 0x7F (JEDEC Maker Code Continuation Code). Why
> can't we simply extend the ID in esmt.c (as you had it in your original
> patch) and increase SPINAND_MAX_ID_LEN to 5? Or, alternatively, only
> extend the ID to 4 bytes?
> 
> If that is the way to go, I would be happy to provide the patches.

Please send the patches. Chuanhong can you test them?

Thanks,
Miquèl