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Message-ID: <CAK9=C2VKiSBX4349jRL0m+XAtT27KSW3GGH+xhaM4ZQoEsAgzg@mail.gmail.com>
Date: Thu, 25 Jan 2024 22:30:13 +0530
From: Anup Patel <apatel@...tanamicro.com>
To: Ley Foon Tan <leyfoon.tan@...rfivetech.com>
Cc: Daniel Lezcano <daniel.lezcano@...aro.org>, Thomas Gleixner <tglx@...utronix.de>,
Palmer Dabbelt <palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>, atishp@...osinc.com,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
Ley Foon Tan <lftan.linux@...il.com>
Subject: Re: [PATCH] clocksource: timer-riscv: Clear timer interrupt on timer initialization
On Thu, Jan 25, 2024 at 10:25 PM Ley Foon Tan
<leyfoon.tan@...rfivetech.com> wrote:
>
> In the RISC-V specification, the stimecmp register doesn't have a default
> value. To prevent the timer interrupt from being triggered during timer
> initialization, clear the timer interrupt by writing stimecmp with a
> maximum value.
>
> Signed-off-by: Ley Foon Tan <leyfoon.tan@...rfivetech.com>
> ---
> drivers/clocksource/timer-riscv.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index e66dcbd66566..a75a74647344 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -172,6 +172,9 @@ static int __init riscv_timer_init_common(void)
>
> sched_clock_register(riscv_sched_clock, 64, riscv_timebase);
>
> + /* Clear timer interrupt */
> + riscv_clock_event_stop();
> +
The riscv_timer_init_common() is called only on boot HART.
I suggest doing riscv_clock_event_stop() in riscv_timer_starting_cpu()
just before enable_percpu_irq().
I also suggest adding an appropriate Fixes tag in the commit description.
Regards,
Anup
> error = request_percpu_irq(riscv_clock_event_irq,
> riscv_timer_interrupt,
> "riscv-timer", &riscv_clock_event);
> --
> 2.43.0
>
>
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> linux-riscv mailing list
> linux-riscv@...ts.infradead.org
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