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Date: Thu, 25 Jan 2024 22:25:52 +0100
From: Luca Weiss <luca@...tu.xyz>
To: ~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org,
 Bjorn Andersson <andersson@...nel.org>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
 Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Konrad Dybcio <konrad.dybcio@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 Vladimir Lypak <vladimir.lypak@...il.com>
Subject: Re: [PATCH 2/3] clk: qcom: gcc-msm8953: add MDSS_BCR reset

On Mittwoch, 24. Jänner 2024 13:10:53 CET Konrad Dybcio wrote:
> On 1/23/24 22:03, Luca Weiss wrote:
> > From: Vladimir Lypak <vladimir.lypak@...il.com>
> > 
> > Add an entry in the gcc driver for the MDSS_BCR reset found on MSM8953.
> > 
> > Signed-off-by: Vladimir Lypak <vladimir.lypak@...il.com>
> > [luca: expand commit message, move entry]
> > Signed-off-by: Luca Weiss <luca@...tu.xyz>
> > ---
> 
> I found some more definitions in lk2nd
> 
> 88:#define  GCC_CRYPTO_BCR                    (CLK_CTL_BASE + 0x16000)
> 106:#define SDCC1_BCR                          (CLK_CTL_BASE + 0x42000) /*
> block reset*/ 125:#define SDCC2_BCR                          (CLK_CTL_BASE
> + 0x43000) /* block reset */ 150:#define USB_HS_BCR                        
> (CLK_CTL_BASE + 0x41000) 155:#define GCC_QUSB2_PHY_BCR                 
> (CLK_CTL_BASE + 0x4103C) 168:#define USB_30_BCR                 
> (CLK_CTL_BASE + 0x3F070)
> 189:#define USB3_PHY_BCR                (CLK_CTL_BASE + 0x3F034)
> 190:#define USB3PHY_PHY_BCR                 (CLK_CTL_BASE + 0x3F03C)
> 
> Couldn't find this one though, did you confirm that MDSS goes off
> when you assert it?

That one's defined here:
https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-4.9/+/refs/heads/int/13/fp3/arch/arm64/boot/dts/qcom/msm8953-mdss-pll.dtsi#21

I'll add some of the others in v2.

> 
> Konrad





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