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Message-ID: <20240126-confirm-jawless-dca60fc9afce@spud>
Date: Fri, 26 Jan 2024 16:32:39 +0000
From: Conor Dooley <conor@...nel.org>
To: "Peng Fan (OSS)" <peng.fan@....nxp.com>
Cc: Jassi Brar <jassisinghbrar@...il.com>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Dong Aisheng <aisheng.dong@....com>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Peng Fan <peng.fan@....com>
Subject: Re: [PATCH v5 1/4] dt-bindings: mailbox: fsl,mu: add i.MX95
Generic/ELE/V2X MU compatible
On Fri, Jan 26, 2024 at 02:29:14PM +0800, Peng Fan (OSS) wrote:
> examples:
> @@ -134,3 +159,34 @@ examples:
> interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> #mbox-cells = <2>;
> };
> +
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + mu2: mailbox@...b0000 {
> + compatible = "fsl,imx95-mu";
> + reg = <0x445b0000 0x10000>;
> + ranges;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + #mbox-cells = <2>;
> +
> + sram@...b1000 {
> + compatible = "mmio-sram";
> + reg = <0x445b1000 0x400>;
> + ranges = <0x0 0x445b1000 0x400>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + scmi_buf0: scmi-sram-section@0 {
If you are resending, the labels here for the section nodes are not used
and should be dropped. Ditto the "mu2" label above.
Otherwise, this looks okay to me.
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Thanks,
Conor.
> + compatible = "arm,scmi-shmem";
> + reg = <0x0 0x80>;
> + };
> +
> + scmi_buf1: scmi-sram-section@80 {
> + compatible = "arm,scmi-shmem";
> + reg = <0x80 0x80>;
> + };
> + };
> + };
>
> --
> 2.37.1
>
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