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Message-Id: <20240129062040.60809-3-qiuxu.zhuo@intel.com>
Date: Mon, 29 Jan 2024 14:20:40 +0800
From: Qiuxu Zhuo <qiuxu.zhuo@...el.com>
To: Tony Luck <tony.luck@...el.com>
Cc: Qiuxu Zhuo <qiuxu.zhuo@...el.com>,
Borislav Petkov <bp@...en8.de>,
Aristeu Rozanski <aris@...hat.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
linux-edac@...r.kernel.org,
linux-kernel@...r.kernel.org,
lili.li@...el.com,
ricardo.neri-calderon@...ux.intel.com
Subject: [PATCH 2/2] EDAC/i10nm: Add Intel Grand Ridge micro-server support
The Grand Ridge CPU model uses similar memory controller registers with
Granite Rapids server. Add Grand Ridge CPU model ID for EDAC support.
Tested-by: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@...el.com>
---
drivers/edac/i10nm_base.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c
index 2b83d6de9352..3fd22a1eb1a9 100644
--- a/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c
@@ -951,6 +951,7 @@ static const struct x86_cpu_id i10nm_cpuids[] = {
X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X, X86_STEPPINGS(0x0, 0xf), &spr_cfg),
X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(GRANITERAPIDS_X, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT_X, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
+ X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
{}
};
MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);
--
2.17.1
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