linux-kernel - Re: [PATCH v4 3/6] dt-bindings: serial: add binding for rs485 rx-enable state when rs485 is disabled

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Mon, 29 Jan 2024 13:26:51 +0100
From: Quentin Schulz <quentin.schulz@...obroma-systems.com>
To: Conor Dooley <conor@...nel.org>,
 Farouk Bouabid <farouk.bouabid@...obroma-systems.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Jiri Slaby <jirislaby@...nel.org>, Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
 Rob Herring <robh@...nel.org>, linux-kernel@...r.kernel.org,
 linux-serial@...r.kernel.org, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH v4 3/6] dt-bindings: serial: add binding for rs485
 rx-enable state when rs485 is disabled

Hi Conor,

On 1/28/24 18:38, Conor Dooley wrote:
> On Fri, Jan 26, 2024 at 03:55:12PM +0100, Farouk Bouabid wrote:
>> RS485 can have a receiver-enable gpio (rx-enable-gpios). When rs485 is
>> enabled, this gpio, if provided, must be driven active while receiving.
>> However when RS485 is disabled this gpio should not have an undefined
>> state. In that case, as DE and RE pins can be connected both to this gpio,
>> if its state is not properly defined, can cause unexpected transceiver
>> behavior.
>> This binding depend on rx-enable-gpios to be implemented.
> 
> Why do you need a dedicated property for this when there exists a device
> specific compatible for the uart on both of the affected rockchip
> systems?
> 

This has nothing to do with Rockchip's IP but the HW design of our 
carrierboard, so using the "rockchip,px30-uart" for that (which I assume 
is what was suggested here?) is incorrect since it'll also apply to 
PX30, RK3399 and RK3588-based Q7 SoCs we manufacture.

Did I understand the suggestion correctly?

Cheers,
Quentin