linux-kernel - Re: [PATCH v3] dt-bindings: misc: xlnx,sd-fec: convert bindings to yaml

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Message-ID: <4792600b-4c08-45dc-a611-2cad4b2fede1@linaro.org>
Date: Tue, 30 Jan 2024 16:24:34 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: "Cvetic, Dragan" <dragan.cvetic@....com>, Rob Herring
 <robh+dt@...nel.org>, Krzysztof Kozlowski
 <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
 "Kiernan, Derek" <derek.kiernan@....com>, Jonathan Corbet <corbet@....net>,
 "Simek, Michal" <michal.simek@....com>, "Erim, Salih" <Salih.Erim@....com>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@...r.kernel.org>, open list <linux-kernel@...r.kernel.org>,
 "open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
 "moderated list:ARM/ZYNQ ARCHITECTURE" <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v3] dt-bindings: misc: xlnx,sd-fec: convert bindings to
 yaml

On 30/01/2024 16:00, Cvetic, Dragan wrote:
> Hi Krzysztof,
> 
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>> Sent: Tuesday, January 30, 2024 2:31 PM
>> To: Cvetic, Dragan <dragan.cvetic@....com>; Rob Herring
>> <robh+dt@...nel.org>; Krzysztof Kozlowski
>> <krzysztof.kozlowski+dt@...aro.org>; Conor Dooley <conor+dt@...nel.org>;
>> Kiernan, Derek <derek.kiernan@....com>; Jonathan Corbet
>> <corbet@....net>; Simek, Michal <michal.simek@....com>; Erim, Salih
>> <Salih.Erim@....com>; open list:OPEN FIRMWARE AND FLATTENED DEVICE
>> TREE BINDINGS <devicetree@...r.kernel.org>; open list <linux-
>> kernel@...r.kernel.org>; open list:DOCUMENTATION <linux-
>> doc@...r.kernel.org>; moderated list:ARM/ZYNQ ARCHITECTURE <linux-arm-
>> kernel@...ts.infradead.org>
>> Subject: Re: [PATCH v3] dt-bindings: misc: xlnx,sd-fec: convert bindings to
>> yaml
>>
>> On 30/01/2024 13:53, Dragan Cvetic wrote:
>>> Convert AMD (Xilinx) sd-fec bindings to yaml format, so it can validate
>>> dt-entries as well as any future additions to yaml.
>>> Change in clocks is due to IP is itself configurable and
>>> only the first two clocks are in all combinations. The last
>>> 6 clocks can be present in some of them. It means order is
>>> not really fixed and any combination is possible.
>>> Interrupt may or may not be present.
>>> The documentation for sd-fec bindings is now YAML, so update the
>>> MAINTAINERS file.
>>> Update the link to the new yaml file in xilinx_sdfec.rst.
>>>
>>> Signed-off-by: Dragan Cvetic <dragan.cvetic@....com>
>>> ---
>>> Changes in v2:
>>> ---
>>> Drop clocks description.
>>> Use "contains:" with enum for optional clock-names and update
>>> comment explaining diference from the original DT binding file.
>>> Remove trailing full stops.
>>> Add more details in sdfec-code description.
>>> Set sdfec-code to "string" not "string-array"
>>> ---
>>> Changes in v3:
>>> Fix a mistake in example, set interrupt type to 0.
>>
>> Why? That's not a correct interrupt type in most of the cases.
> 
> The interrupt type is set to active high in IP, cannot be changed with driver.
> I keep 0 to be aligned with the original document.
> What do you suggest?

Use proper type, so active high.


Best regards,
Krzysztof