[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <170663195756.398.9260239005987391538.tip-bot2@tip-bot2>
Date: Tue, 30 Jan 2024 16:25:57 -0000
From: "tip-bot2 for Michael Roth" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Michael Roth <michael.roth@....com>,
"Borislav Petkov (AMD)" <bp@...en8.de>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: x86/sev] x86/cpufeatures: Enable/unmask SEV-SNP CPU feature
The following commit has been merged into the x86/sev branch of tip:
Commit-ID: c3b86e61b75645276aa2565649a6da5d6e77030f
Gitweb: https://git.kernel.org/tip/c3b86e61b75645276aa2565649a6da5d6e77030f
Author: Michael Roth <michael.roth@....com>
AuthorDate: Thu, 25 Jan 2024 22:11:22 -06:00
Committer: Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Mon, 29 Jan 2024 20:34:19 +01:00
x86/cpufeatures: Enable/unmask SEV-SNP CPU feature
With all the required host changes in place, it should now be possible
to initialize SNP-related MSR bits, set up RMP table enforcement, and
initialize SNP support in firmware while maintaining legacy support for
SEV/SEV-ES guests. Go ahead and enable the SNP feature now.
Signed-off-by: Michael Roth <michael.roth@....com>
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Link: https://lore.kernel.org/r/20240126041126.1927228-23-michael.roth@amd.com
---
arch/x86/include/asm/disabled-features.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index fc13bf7..3332d29 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -117,7 +117,11 @@
#define DISABLE_IBT (1 << (X86_FEATURE_IBT & 31))
#endif
+#ifdef CONFIG_KVM_AMD_SEV
+#define DISABLE_SEV_SNP 0
+#else
#define DISABLE_SEV_SNP (1 << (X86_FEATURE_SEV_SNP & 31))
+#endif
/*
* Make sure to add features to the correct mask
Powered by blists - more mailing lists